【作者】 郭双友；

【导师】 杨银堂；

【作者基本信息】 西安电子科技大学 ， 微电子学与固体电子学， 2009， 硕士

【摘要】 随着深亚微米技术的发展,嵌入式存储器在片上系统芯片(SoC)上占有越来越多的比重。由于嵌入式存储器中晶体管密集,存在高布线密度、高复杂度和高工作频率等因素,很容易发生物理缺陷。因此,研究高效率的测试算法,建立有效地嵌入式存储器测试方法,对提高芯片成品率,降低芯片生产成本具有十分重要的意义。测试算法是存储器测试的核心内容。算法的推导需要在故障覆盖率和算法复杂度上进行折衷。因此,如何得到低复杂度、高故障覆盖率的算法,是算法研究的难点。同时,存储器内建自测试(MBIST)电路作为附加测试电路,要求具有尽可能小的面积及功耗,而且不能影响存储器电路的正常工作。本文从单一单元故障和耦合故障的13种存储器故障类型的研究出发,针对每种故障原语提出对应的March测试算法,通过这些测试算法的优化合并,推导出65nm工艺要求下的新型March 28算法,新算法可以检测所有现实的连接性故障、单一单元故障、耦合故障和数据保持故障,并且复杂度减少12.5%。对于用户自定义March算法的研究有一定的理论参考价值。之后生成了针对新算法的MBIST电路,在进行了优化升级之后应用于SoC上84个嵌入式存储器的测试,最后对MBIST电路的模块级和芯片级仿真结果表明,在不引入I/O管脚的情况下,可实现对存储器的测试。测试结果表明,本文设计的测试算法和电路满足研究设计要求,对实际应用提供了重要参考。更多还原

【Abstract】 With the development of the submicron technology, embedded memories have occupied more area on SoC (system on chip). Because of the high frequency, complexity and the high density of the transistors and layout, the physical defacts occur on the embedded memories easily. So an effective algorithm and test method are significant to the yield improvement and product cost saving. The test algorithm is the kernel of the memory test. The inference of test algorithm must be tradeoff on the algorithm complexity and fault coverage. How to infer a low complexity and high fault coverage algorithm is the difficulty of algorithm reseach. Otherwise, the MBIST circuit is a additional test logic for chip, so area and power cost of the MBIST circuit must be limited properly.This thesis researches the 13 kinds fault primitive of single-cell faults and coupling faults, develops the test algorithm for each fault primitive. The new test algorithm (March 28) has been infered based on the optimization of these algorithms for 65nm technology. The new algorithm can optimize the fault coverage and test time. It can detect all link-faults, all single-cell faults, all coupling faults and data retention fault. The algorithm complexity reduces 12.5%. Based on the March 28 algorithm, MBIST circuits are generated by EDA tool. The MBIST logic are optimized in chip level connecting and implemented in 84 memories on a chip which is based on Infineon 65nm technology. The simulation of the algorithm proves that the March 28 algorithm can detect more fault modes than March C+ and March LR. The simulation of the MBIST circuits in chip level proves that the MBIST logic can test embeded memory without increasing I/O pad. The test algorithm and MBIST circuit in this thesis satisfy all requirements in actual application.更多还原