高速数字PCB互连设计信号完整性研究

【作者】 贾凯宾；

【导师】 黄锦安； 蔡小玲；

【作者基本信息】 南京理工大学 ， 电路与系统， 2008， 硕士

【摘要】 随着数字系统时钟频率越来越高,信号跳变时间越来越短,高速数字PCB的互连设计对整个系统电气性能的影响也越来越大。高速系统中,高速信号经过互连线时会产生一系列的信号完整性(Signal Integrity,简称SI)问题。因此,如何处理由高速互连引起SI问题,已成为高速数字系统设计成功与否的关键问题之一。本文主要研究由高速无源互连单元所引起的延时、反射、串扰、不连续性等SI问题。首先分析了反射和串扰发生的机理,并给出了通过端接技术减小反射的仿真波形和通过改变传输线参数对串扰影响的仿真波形,得出了一些减小串扰的措施。然后,分析了差分阻抗控制及差分对抗串扰能力。通过“场”“路”结合的方法对差分互连的传输特性和远端串扰进行了建模仿真分析,并推导出奇模、偶模传播速度存在差异,导致差分微带结构引入额外噪声。最后,对高速互连设计中的单端和差分互连不连续性问题如:过孔、拐角和回流不连续进行SI分析和建模仿真,通过对S参数曲线的分析得出:过孔的传输特性与过孔孔径、焊盘和反焊盘的直径大小有关;单端拐角中的45°外斜切结构具有更好的传输性能,差分拐角的长度不匹配会引入差分噪声,差分噪声的大小与信号上升时间有关;地平面开槽造成回路电感增加,引入不连续,设计中应避免参考平面的开槽。总之,由仿真和分析结果可以得出一些减小SI问题的结论,由此制定相关的布局、布线规则来约束PCB设计,可以达到良好的设计效果,缩短研发周期,也进一步证明了对高速互连进行信号完整性分析的重要意义。更多还原

【Abstract】 As the digital system’s clock frequency is growing higher and the signal’s switch time is getting shorter,and the impact of high-speed digital PCB interconnect design on the whole system’s electrical characteristic is growing greater.In high-speed system,the interconnect among the high-speed signals will cause a series of signal integrity issues.Therefore,how to deal with the signal integrity issues caused by high-speed signal interconnects has become the key of a high-speed digital system design to success.This dissertation mainly studies Delay,Reflection,Crosstalk,discontinuity of microstrip, and other signal integrity issues caused by high-speed interconnects.This dissertation first analysed the reasons of reflection and crosstalk,and also shows the waveforms of reducing reflection by adding terminators and the waveforms of the crosstalk influenced by changing the parameters of transmission lines.And we got some measures to reduce crosstalk.Then, we focus on the differential line impedance control and anti-crosstalk ability of differential pairs.Through.the "field"&"Circuit" method,the difference interconnect transmission characteristic and the far-end crosstalk were simulated and analysed.Because the odd-mode and even-mode’s propagation velocity existed difference,the difference microstrip structure in(?)uced extra noise.Finally,we do SI analysis and simulation to the discontinuity of the high speed interconnect such as:via,corner and slot.Through the analysis of S-parameters, we got these:a via transmission characteristic relates with the via,pad and anti-pad’s diameter;The 45°outside bevelling structure has better transmission characteristic.The mismatch of differential comer length introduces difference noise,which relates with the rise time;The slot in ground plane causes the return route inductance to increase,introduces discontinuity,it should be avoided in the design.In short,we could draw some conclusions which can reduce SI issues through simulation and analysis.According to these,we can make layout,routing rules to restrain PCB design,so the design can achieve good performance,shorten the development cycle of hardware.And it also proved the importance to make SI analysis to high-speed interconnect.更多还原