准连续波雷达相关技术研究及实现

【作者】 牛启波；

【导师】 郭山红；

【作者基本信息】 南京理工大学 ， 信号与信息处理， 2008， 硕士

【摘要】 准连续波雷达把连续波雷达技术和脉冲多普勒雷达技术结合起来,使雷达信号既像连续波雷达信号一样,具有大时宽带宽积,又采用脉冲雷达发射、接收分时工作的方式,克服连续波雷达收发隔离的困难从而彻底解决了连续波雷达发射信号的泄漏问题。文中分析了编码二相调制准连续波雷达工作原理,参数特性,研究了MAC序列的产生,对MAC序列的自相关和互相关特性、限幅脉压和全幅脉压下的测距性能及抗遮挡效应进行了仿真比较。在分析最大熵算法的基础上,对Burg外推算法作进一步研究,对理想信号及一定信噪比条件下,已知不同序列长度时Burg算法的外推性能进行了仿真比较。给出了编码二相调制准连续波雷达信号处理机的硬件设计框图,并对A/D转换模块、FPGA模块、双口RAM模块及电源和时钟模块进行了电路设计。对基于FPGA的数字相关器实现进行了深入研究,分析了量化比特、采样速率对匹配滤波器的性能影响,给出了直接型、转置型和折叠转置型匹配滤波器的结构,完成了上述匹配滤波器的FPGA编程设计,并应用Chipscope在线逻辑分析仪在硬件平台上进行了实验验证。此外还实现了FIR数字滤波器的FPGA编程并通过了实验验证。更多还原

【Abstract】 Quasi-continuous wave (QCW) radar combines the technology of continuous wave radar and pulse doppler radar, so that the radar signal has the large time-bandwidth product, just like the continuous wave radar, at the same time, the transmission and reception are isolated , just like the pulse doppler radar. So the quasi-continuous wave radar can overcome problems of the signal leakage which CW radar can hardly solve.The principles of binary phase modulation QCW radar are analyzed , via simulation, the properties of self-correlation and inter-correlation ,the performance of measure distance with the method of two kinds of pulse compression and the ability of anti-shelter effect are studied emphatically, on the base of the Maximum of Entropy Method, the Burg algorithm is further studied, under the conditions of ideal signal and certain signal-to-noise ratio, when the known bits of sequence is different, the performance of Burg algorithm is compared via simulation. The hardware frame of QCW radar signal processor is offered . the circuit of ADC module , FPGA module , dual-port RAM module and power and clock module is presented . the digital correlation device based on FPGA is studied and ,the effect of quantization bits and the rate of sample on the performance of digital matched filter(DMF) is analyzed , the structures of DMF are offered, such as direct structure , transposed structure and folded structure. The DMF and FIR filter based on FPGA is implemented, and the design has stable performance by testing.更多还原