【作者】 朱希志；

【导师】 杨扬； 贾立新；

【作者基本信息】 浙江工业大学 ， 电子与通信工程， 2007， 硕士

【摘要】 直接数字频率合成(DDS)是近几年发展起来的一种频率合成新技术,它具有输出信号稳定、分辨率高、相位连续、可控性好等优点,在现代电子系统中应用十分广泛。论文首先介绍了DDS的发展及现状,并分析了DDS输出杂散噪声抑制等问题。利用Altera公司的设计工具QuartusⅡversion 6.0的软件编程和Block Diagram的设计方法,将现场可编程逻辑器件(FPGA)和DDS技术相结合,完成了DDS信号发生器各个模块的设计。采用流水线技术设计了32位相位累加器,大大提高了DDS系统的工作频率;利用NiosⅡ软核实现人机接口和数据计算,波形生成部分采用了多种高性能的模拟集成电路,缩小了整个系统体积,对提高整个系统的性能指标起到了关键作用,满足了系统设计要求。最后,文章给出了主要模块的仿真结果和整个系统的测试结果。测试结果表明,该信号发生器基本达到了预期的设计指标,证明了利用NiosⅡ软核实现DDS信号发生:器的方案是可行的,且具有性价比高、设计灵活、性能可靠等优点。更多还原

【Abstract】 Direct Digital Frequency Synthesis (DDS) is a newly developed technique which has many virtues, such as stabile output signal、continuous phase、high precision、easy control, etc. It is widely used in modern electron system.The thesis introduces the development and status of DDS, and analyzes some problems, such as the noise suppression of output signal noise. The various module designs of DDS function generator are finished by combining FPGA and DDS technology under the software QuartusⅡversion 6.0 environment. The thesis explains the design and realization ways of all the modules, such as using pipelining technique to implement the 32-bit phase accumulator, using NiosⅡto input and count frequency and adopting high performance analog IC to design waveform generator for reducing the size of the system, which play an very important role in improving the performance of the whole system.Finally, the thesis gives the simulation results of main modules and test results of the whole system. The results indicate that the function generator has basically realized the expected design target. The design proves that using single chip and FPGA to realize DDS random signal generator is feasible, and it also has many virtues, such as low price、easy design and reliable performance.更多还原