【作者】 李群桥；

【导师】 王景存；

【作者基本信息】 武汉科技大学 ， 控制理论与控制工程， 2007， 硕士

【摘要】 随着信息技术的发展,数字信号的采集与处理在科学研究、工业生产、航空航天、医疗卫生等部门得到越来越广泛的应用,这些应用中对数字信号的传输速度提出了比较高的要求。传统的基于ISA总线的信号传输效率低,严重制约着系统性能的提高。PCI总线以其高性能、低成本、开放性、软件兼容性等众多优点成为当今最流行的计算机局部总线。但是,由于PCI总线硬件接口复杂、不易于接入、协议规范比较繁琐等缺点,常常需要专用的接口芯片作为桥接,为了解决这一系列问题,本文提出了一种基于FPGA的PCI总线接口桥接逻辑的实现方案,支持PCI突发访问方式,突发长度为8至128个双字长度,核心FPGA芯片采用ALTERA公司的CYCLONE FPGA系列的EP1C6Q240C8,容量为6000个逻辑宏单元,速度为-8,编译后系统速度可以达到80MHz,取得了良好的效果。基于FPGA的PCI总线接口桥接逻辑的核心是PCI接口模块。在硬件方面,特别讨论了PCI接口模块、地址转换模块、数据缓冲模块、外部接口模块和SRAM DMA控制模块等五个功能模块的设计方案和硬件电路实现方法,着重分析了PCI接口模块的数据传输方式,采用模块化的方法设计了内部控制逻辑,并进行了相关的时序仿真和逻辑验证,硬件需要软件的配合才能实现其功能,因此设备驱动程序的设计是一个重要部分,论文研究了Windows XP体系结构下的WDM驱动模式的组成、开发设备驱动程序的工具以及开发系统实际硬件的设备驱动程序时的一些关键技术。本论文最后利用基于FPGA的PCI总线接口桥接逻辑中的关键技术,对PCI数据采集卡进行了整体方案的设计。该系统采用Altera公司的cycloneⅡ系列FPGA实现。更多还原

【Abstract】 With the development of information technology, digital signal acquisition and processing in the scientific research, industrial production, aerospace, medical and public health departments have increasingly broad applications. These applications have a high demand to the digital signal transmission speed. Based on the ISA bus signals transmission is inefficient, and seriously hampering the improvement of system performance.The PCI bus with its high-performance, low-cost, open, software compatibility and many other advantages become the most popular computer bus in today’s local bus. However, as the PCI bus hardware interface is complex and difficult to access, such as protocol specification is relatively more complicated, often requires special interface chip as a bridge, in order to solve this problems, this paper, gives to a FPGA-based PCI bus interface logic bridging implementation, the system supports burst visit, the burst length is 8 to 128 pairs of words, the core FPGA chip is using Altera’s CYCLONE FPGA series EP1C6Q240C8, capacity of 6,000 logic units and a speed of minus 8, after compiling the system speed can reach 80 MHz, and have achieved good results.The PCI interface module is the core of FPGA-based PCI bus interface logic bridging implementation. In terms of hardware, this paper discusses the PCI interface module particularly, address transmission module, data buffer module, external interface module and SRAM DMA control module, this paper gives to the design of programs and hardware circuit and focuses on the analyzing of the PCI interface module’s data transmission, using modular method to realize the internal control logic and the related timing simulation and logic verification, hardware needs the software to achieve its function, then the device’s driver programme design is an important part of the this design. This paper investigates the composition of WDM driver module under the Windows XP architecture, the development tool of device driver as well as the key technology that related to the actual hardware device driver. Lastly, it sums up the designing experience and point out its limitation, and makes a forecast of this system.Lastly, this paper uses the key technology of FPGA-based PCI bus interface logic bridging, then we design the frame of the whole system of PCI data acquisition card. The system uses the cycloneⅡs eries Altera FPGA.更多还原