【作者】 雷立云；

【导师】 黎福海；

【作者基本信息】 湖南大学 ， 电路与系统， 2007， 硕士

【摘要】 本文对频率合成技术的发展过程进行了归纳叙述,对数字频率合成技术的原理和提高DDS性能进行了分析研究。运用DDS专用器件ML2035设计了一低频高精度正弦信号发生器电路,并对DDS专用器件AD9851结合单片机技术进行了应用研究。本文重点利用FPGA芯片及D/A转换器,采用直接数字频率合成技术,设计实现了一个频率、相位可调的正弦信号发生器系统模块。本系统设计单元主要由32位4级流水线相位累加器(ADD)、相位调制器(ADD1)、象限求补器(REG1)、ROM查找表(LPM_ROM)、符号求补器(REG2)等几部分组成。通过FPGA的开发软件Max+plusⅡ,将设计程序编译综合后的DDS信号源设计文件,在线编程到FPGA开发板上,利用TEK示波器采集输出信号。图4.9是本次设计捕捉的输出信号波形。图中输出信号频率非常接近软件仿真结果。经过系统设计仿真和电路测试,输出波形达到了技术要求。DDS是一种全数字化的频率合成器,时钟频率给定后,输出信号的频率取决于频率控制字,频率分辨率取决于累加器位数,相位分辨率取决于ROM的地址线位数,幅度量化噪声取决于ROM的数据位字长和D/A转换器位数。AT89C51单片机实现用户需要的频率字,波形的产生以及与上位机通信等逻辑控制功能。随着微电子技术的迅速发展,直接数字频率合成(DDS)得到了飞速的发展,它在相对带宽、频率转换时间、相位连续性、正交输出、分辨率以及集成化等一系列性能指标方面已远远超过了传统频率合成技术。用高性能的FPGA器件设计符合自己需要的DDS电路就是一个很好的解决方法。更多还原

【Abstract】 In this paper, frequency synthesizer technology to the development process are described, the digital frequency synthesis technology and the principle of raising performance of DDS Research. Using DDS devices ML2035 design for a low-frequency sinusoidal signal generator circuit precision, and DDS dedicated device AD9851 combine MCU technology for the Applied Research.This paper focus on the use of FPGA chip and D / A converters, direct digital frequency synthesis, design to achieve a frequency, phase adjustable sinusoidal signal generator system module. The main modules of the system design by 32 four pipeline phase accumulator (ADD), phase modulator (ADD1), seeking fill-quadrant (REG1), the ROM look-up table (LPM_ROM), the symbol for meeting with (REG2), and other parts composition. FPGA development software through the Max + Plus II, will design procedures after the DDS compiler integrated signal source design documents, online programming to FPGA development board, using TEK oscilloscope acquisition output signal. Figure 4.9 is designed to capture the output of the signal waveform. Map output signal frequency, very close to the software simulation results. The system design simulation and test circuit, the output waveform to the technical requirements.DDS is a digital synthesizer, a given clock frequency, the output signal frequency depends on the frequency control characters, the median frequency resolution depends on the accumulator, phase resolution depends on the address line ROM median rate of noise depends on the ROM data bit word length and the D / A converters median. AT89C51 achieve user needs word frequency, waveform generation and communication with the PC, such as logic control functions.Along with the rapid development of microelectronics technology, Direct Digital Synthesis (DDS) has made rapid development, its relative bandwidth, frequency converters, phase continuity, orthogonal output, resolution and integration of a series of performance indicators, etc. far exceeds the traditional frequency synthesizer technology. Using high-performance FPGA design conform to the needs of DDS circuit is a good solution.更多还原