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并行DDS激励PLL的微波捷变频综技术研究
【作者】 李健开;
【导师】 唐小宏;
【作者基本信息】 电子科技大学 , 无线电物理, 2006, 硕士
【摘要】 自从七十年代初DDS即直接数字频率合成技术提出以来,DDS技术就以其优异的频率切换速度和频率分辨率得到广泛的关注,同时吸引了大批科学家的研究,DDS技术因此得到快速的发展。由于DDS是全数字结构,因此存在输出带宽窄和杂散抑制差的缺点。特别是在输出带宽增加时,杂散抑制度变差,而且输出频率较低。PLL即锁相技术虽然也是比较成熟的技术,但是它有自身优点的同时也有频率转换速度慢,频率分辨率不高的缺点。因此在很多场合下都采用DDS+PLL技术方案,使系统指标得以改善。但是在某些雷达和通信系统中,对杂散和跳频速度都提出了新的要求,单纯的采用DDS+PLL技术已经很难满足系统的要求。因此我们进行了并行DDS激励PLL的微波捷变频综技术研究。 以下给出全文的结构: 第一章首先阐述了近代频率合成技术的发展,并详细介绍了当代频率合成技术的基本方法和各自的优缺点。 第二章对DDS技术和锁相技术进行了详细的分析比较,为后面方案研究提供理论基础。 第三章分析了现阶段比较常用的跳频源技术合成方法,详细比较他们的优缺点,在此基础上提出了并行DDS激励PLL的微波捷变频率合成技术。 第四章是本文的重点内容,为了验证并行DDS激励PLL的微波捷变频率合成方案,给出了该方案详细的实验设计研究。 第五章为系统的调试以及结果分析,实验结果验证了该方案的有效性。其测试结果为:工作频率范围:655MHz~675MHz;杂散电平:优于-70dBc;相位噪声:≤-99dBc/Hz@10kHz;频率转换时间:≤0.06μs;跳频步长:0.15625MHz。
【Abstract】 From the early 70s, when direct digital frequency synthesizer (DDS) technology was proposed, it beacame the focus. Its high frequency switching speed and the excellent frequency resolution attracted many scientists to do further research on DDS. And the DDS has got considerable progress. But with its digital system, it has the shortage of too narrow bandwith and bad spurs level. Meanwhile, PLL technology also has the contradiction between the frequency switching speed and frequency resolution. Just for the aboving reason, many people use the method of DDS+PLL to improve the performance of the system. But in some rada and communication systems, they require higher speed and more excellent spurs level. Only by the method of DDS+PLL, it can’t satisfy these requires.So we propose a method by using double DDS+PLL to improve the performance of the system.The following are the structure of this paper:Chapter 1, the development of the frequency synthesizers are analyzed, which give the base of frequency synthersizer methods and their futures.Chapter 2, the basic theory of DDS and PLL are introduced, which lay the theoretical base for the frequency synthesizer.Chapter 3, the methods of the frequency synthesizer in commom use are analyzed and compared, and the advantages and disadvantages of each technique was also introduced.Base on this analysis, a novel frequency syntesizer method is given.Chapter 4, an experiment on the technology is operated in order to verify the new method of frequency synthesizer proposed in the previous chapter.Chapter 5, the results of the previous experiment are given, that is , the output frequency range: 655~675MHz , SFDR: -70dBc , phase noise: ≤ -99dBc/Hz@10kHz, hopping time: 0.06 μs, hopping step 0.15625MHz.
【Key words】 DDS; PLL; Phase noise; SFDR; Frequency hopping; Frequency synthesizer;
- 【网络出版投稿人】 电子科技大学 【网络出版年期】2006年 12期
- 【分类号】TN74
- 【被引频次】23
- 【下载频次】537