基于多相滤波的宽带DDC及其FPGA实现

【作者】 曾克；

【导师】 钟洪声；

【作者基本信息】 电子科技大学 ， 信号与信息处理， 2005， 硕士

【摘要】 随着现代雷达技术的不断发展,电子侦察设备面临电磁环境日益复杂多变,发展宽带化、数字化、多功能、软件化的电子侦察设备已是一项重要的任务。然而,目前的宽带A/D 与后续DSP 之间的工作速率总有一到两个数量级的差别,二者之间的瓶颈成为电子侦察系统数字化的最大障碍。通信领域软件无线电的成功应用为电子侦察系统的发展提供了一种理想模式。另一方面,微电子技术的快速发展,以及FPGA 的广泛应用,在很大程度上影响了数字电路的设计与开发。这也为解决高速A/D 与DSP 处理能力之间的矛盾提供了一种有效的解决方法。为了解决宽带A/D 与后续DSP 之间的瓶颈问题,本文给出了一种基于多相滤波的宽带数字下变频结构,并从软件无线电原理出发,从理论推导和计算机仿真两方面对该结构进行了验证,并进一步给出该结构改进方案以及改进的多相滤波数字下变频结构的硬件实现方法。本文将多相滤波下变频的并行结构应用到数字下变频电路中,并在后继的混频模块中也采用并行混频的方式来实现,不仅在一定程度上解决了二者之间的瓶颈问题,同时也大大提高了实时处理速度。经过多相滤波下变频处理后的数据,在速率和数据量上都有大幅减少,达到了现有通用DSP 器件处理能力的要求。另外,本人还用FPGA 设计了实验电路,利用微机串口,与实验目标板进行控制和数据交换。利用FPGA 的在线编程特性,可以方便灵活的对各种实现方法加以验证和比较。更多还原

【Abstract】 The continuous developments of modern radar technology and the consequent more complicated electromagnetic environment have made it crucial to design wideband, digital, multifunctional software electronic reconnaissance equipment. The digital signal processing has drawn wide attentions in the engineering area and provides an idea development mode for electronic reconnaissance system, which is different form the communication system in its wide-band processing. At present, the mismatch between the high-speed data flow of the wideband A/D converter and processing capability of the general DSP hinders the digitization of the electronic reconnaissance system most. On the other hand, the fast developments of micro-electronic technology and the wide applications of FPGA made digital circuit design more effective and afford an available method to resolve the mismatch between high-speed A/D converters and DSP chips. To resolve the mismatch between high-speed A/D converters and DSP chips,a DDC structure based on polyphase decomposition is intoduced,and it is verificated in the text from not only theories deducing but also computer imitatation according to the Software Radio Principle.In the end,a improvement structure with its realize method of hardware is put forward further. Parallel structure of polyphase decomposition and parallel mixer is applied in the DDC circuit,it solves the bottleneck in mixing and increases the handless speed. The partition of the tuning channel according to the digital mixing sequence, and the DDC by means of decimating first, the low-pass filtering and mixing realize efficiently the down-conversion of the variable carrier frequency band-pass signal. An emulation board of full-probability digital receiver is developed to realize the verification cuicut for the implementations of DDC and frequency estimation algorism with FPGA. The COM port is used to change data between the board and the PC. And this emulation board can be easily used to do verification for the更多还原