【作者】 廖华赟；

【导师】 吴伟民；

【作者基本信息】 广东工业大学 ， 计算机应用， 2005， 硕士

【摘要】 本文对程序可视化的关键技术——可视虚拟机的系统架构和实现方法进行了详细的研究,归纳总结了可视虚拟机的设计步骤和指导架构。可视虚拟机的基本架构可以归结为内核层(包括虚拟机、汇编器或者高级语言编译器)和可视表达层(内存和堆栈的可视表达模块、外围设备的可视化仿真模块、程序流程图的生成和动态可视化模块等)。虚拟机内核解释执行由汇编器产生的机器码或者中间代码,向各个可视表达模块发送可视表达指令,从而实现程序运行过程中,CPU、内存、堆栈和程序执行流的同步动态可视化。 本文还详细研究了汇编语言程序流程图的抽象描述和生成算法,以及流程图与程序执行过程的动态同步显示问题。系统在形式化文法引导的汇编阶段实现了对程序流的建构,根据不同类型的指令,生成相应形式的抽象节点,并将相关信息存入系统符号表,最终实现节点之间的准确链接,形成与汇编程序相对应的程序流程结构,在机器指令执行期间,结合机器指令执行过程中携带的时间信息实现程序流程图的动态可视化。 为了验证本文提出的可视虚拟机设计方法和思路,完成了一个基于X8086体系的可视虚拟机X86VVM的设计和实现,其中可视虚拟机X86VVM内核采用纯C/C++语言开发。 本文内容组织如下:第一章简要介绍了X86VVM的技术背景和研究意义;第二章介绍了X86VVM可视虚拟机的规范和指令系统;第三章介绍了系统的基本构架,内核的基本结构和设计;第四章介绍了各个可视表达模块的设计;第五章简要介绍了可视调试的实现和使用;最后对本文作了总结,对后续研究作了建议和展望。更多还原

【Abstract】 This research focuses on the realization of the visualized virtual machine, which is a key technology of program visualization. The design steps and the guiding framework for the visualized virtual machine are also to be summarized. The kernel layer and the visualized expression layer construct the basic framework of the visualized virtual machine. The kernel layer is composed of an assembler translator and a virtual machine kernel. The visual layer is composed of the visualized simulation modules of peripheral devices, visualized modules of memory and stack, generation of the program flow chart, and dynamic visualized tracing modules, etc. The virtual machine kernel interprets the machine codes generated by the assembler translator, or the intermediate codes, and transmits the visualized expression instructions into each visualized expression module so as to the simultaneous and dynamic visualizations of the CPU, the stack, the memory, and program execution flows in the process of program execution are to be achieved.This thesis also studies the abstract descriptions for the flow chart of assemble code with computer software, the generation algorithm, and the synchronization with the execution process for machine code. The abstract flow chart of programs is constructed in the assembling process which is guided by formalized syntax. During this assembling process the corresponding nodes of abstract flow chart are produced according to the different assemble instructions, the relevant information is stored into the system symbol table. At the last process of assembling the accurate interlinkage will to be achieved and the corresponding flow chart is formed. During the execution of machine codes the dynamic visualization of flow chart comes true with the time information which is taken by更多还原