【作者】 王光；

【导师】 李玉山；

【作者基本信息】 西安电子科技大学 ， 电路与系统， 2002， 硕士

【摘要】 本论文的设计工作源于国家八六三项目——《视频数字信号处理IP核的设计》。论文完成了其中的标量微处理器部分的研究与设计。 论文采用自顶向下的正向设计方法，完成了视频DSP XY-VDSP芯片中的32位标量微处理器的体系结构设计、电路实现以及FPGA验证。 本论文作者的主要研究与设计工作如下： 首先，论文作者参与研究和设计了整个视频DSP系统的体系结构；在此基础上作者研究提交了32位标量微处理器的实现方案，并完全实现了其电路。其中，特别研究了合理选择处理器数据通路中最主要的两个部件——加法器和移位寄存器的方法，并最终实现了32位标量微处理器中的跳跃进位加法器和桶式移位寄存器。 其次，论文讨论了中断控制器和系统的内建测试功能的设计方案，并实现了其功能。 第三，对整个标量微处理器进行了功能级仿真，包括逐条指令仿真，特殊指令程序段仿真和应用程序实例仿真，并且进一步与整个视频DSP系统连在一起，对标量微处理器进行了功能仿真。 最后，对32位标量处理器进行了FPGA验证。 目前，该视频DSP项目已经通过了国家八六三专家组的验收。该项目的研究成果，有助于加快我国研制具有自主版权的视频DSP芯片的进程，为视讯电子系统的核心芯片国产化打下基础，具有重要的应用前景。更多还原

【Abstract】 This thesis is originated from a national 863 Project, the Design of Video DSP Core. It focuses on the research and design of scalar processor of Video DSP XY-VDSP.The thesis describes the design and implementation of 32bit scalar micro-processor in XY-VDSP Video DSP with top-down design methodology. The FPGA prototype is also verified successfully.According to the research plan, the major work fulfilled by the author is follows:Firstly, the author of this thesis participates in studying and designing of the architecture of the Video DSP. Then the author investigates and presents the design scheme of the 32bit scalar micro-processor, and performs complete circuit design of the whole 32bit scalar micro-processor. Especially, this thesis studies the implementation of adder and shifter, which are the two key components in the data path under researching, and implements carry skip adder and barrel shifter in the 32bit scalar processor.Secondly, this thesis discusses the design scheme of the interruption controller and built-in debug aides, and implements their functions.Thirdly, the task of this thesis goes through the function simulation of the whole scalar micro-processor, including single instruction simulation, special instruction program segment simulation and application program simulation. And furthermore, the function simulation of the whole scalar micro-processor is completed in the environment of video DSP.Finally, the whole 32bit scalar micro-processor has verified using FPGA prototyping.This research work has been checked and accepted by the expert group of National 863 Project successfully. The research results of the thesis will be beneficial to the design process of the self-developed Video DSP processor of our own nation, and will have significant applications in the future.更多还原