【作者】 杨迎；

【导师】 史江一； 焦继业；

【作者基本信息】 西安电子科技大学 ， 软件工程， 2011， 硕士

【摘要】 随着集成电路的飞速发展,模拟和数字之间的转换扮演着越来越重要的角色。在众多的ADC结构中,Sigma-Delta ADC利用过采样技术和噪声整形技术,不但提高了信噪比而且能够有效衰减输出信号带内的量化噪声,从而降低了功耗,与传统的Nyquist转换器相比,它降低了对模拟电路性能指标和元件精度的要求,简化了模拟电路的设计,降低了生产成本。目前在高精度音频带宽的Sigma-Delta ADC中存在较大的功耗(>10mW),对∑△ADC的深入研究和发展趋势上设计了精度为13位的低功耗调制器,具有330μW的功耗。分析了调制器对量化噪声的整形作用,讨论了几种常见的Nyquist结构的ADC,比较了不同结构的Sigma-Delta调制器的系统设计,通过比较几种不同结构的调制器性能后,选定单环2阶调制器,并对调制器中非理想因素进行了分析,确定了主要的电路模块。完成了折叠式共源共栅运算放大器、比较器、两相非交叠时钟等子模块设计,确定电路的参数,在Cadence下完成电路的设计和仿真,完成版图设计,并对于版图设计中遇到的问题给予阐述。采用了0.35μm、N井、2层poly、3层铝线的XFABBCD工艺加以模拟,在电源电压为3.3V,采样速率为32KHZ,过采样比为128倍的条件下,电路仿真结果表明,调制器的信噪比约为80dB,功耗约为330μW ,达到了13bit低功耗∑△ADC调制器的设计指标。更多还原

【Abstract】 With the rapid development of integrated circuits, the conversion between analog and digital plays a more important role. Among many ADC, Sigma-Delta ADC improves SNR (Signal to Noise Ratio) and reduces the noise in output signal band efficiently by adopting over-sampling and noise-shaping technology. Therefore, the power is reduced. Compared with traditional Nyquist converters, Sigma-Delta ADC decreases the requirements of analogue circuit’s performance specification and device accuracy, simplify the design of analog circuit, and reduce the cost of manufacturing. Currently, there is comparatively high power (>10mW) in high resolution Audio Frequency∑△ADC Converters, this paper design a modulator with 13bit resolution and less than 330μW power consumption based on analysis of the trend of∑△ADC.This paper analyzes the modulator’s shaping of the quantization noise, discusses several common ADC of Nyquist structure, compares the system design of various Sigma—Delta modulator. After the comparison, 2nd-order modulator has been implemented and non-ideal factors have been analyzed and main circuit blocks have been determined. The design of cascade amplifier, comparator, two-phase non-overlapping clock signal has been finished, parameter of these circuits has been confirmed, the design, simulation and layout design of these circuits under Cadence have been completed. Problems encountered in layout design have also been expatiated.By adopting the XFAB BCD process with 0.35~μm, N-well, 2P/3M to simulate under the condition of 3.3V power supply, 32kHz sampling rate, 128 oversampling rate, the circuit simulation indicates that the SNR (signal to noise ratio) is about 80db, power consumption is about 330μW , which meets the design specification of 13 bits low power consumption Sigma-Delta ADC modulator.更多还原