【作者】 杨萌萌；

【导师】 屠海令； 杜军；

【作者基本信息】 北京有色金属研究总院 ， 材料科学与工程， 2013， 博士

【摘要】 随着CMOS集成电路的快速发展,传统的SiO2栅介质不适用于集成电路继续发展的需要,需要采用高介电常数栅介质薄膜作为替代材料。但是采用高k材料作为栅介质后,高k材料中高的缺陷态密度、高k材料与衬底之间的界面层以及高k材料的热稳定性等问题也随之出现；同时,器件性能的提高对于沟道载流子迁移率要求更高,采用具有高载流子迁移率的Ⅲ-Ⅴ族半导体作为沟道材料越来越多的引起了人们的关注；而当集成电路发展到16nm技术节点之后,对更高介电常数栅氧化物的需求也日益凸显。本文选取了HfO2. CeO2-HfO2(CDH)、Gd2O3-HfO2(GDH)、HfTiO作为研究对象,利用磁控溅射或原子层沉积技术在Si或者InP上沉积高k栅介质薄膜,并进行了结构表征与性能测试,讨论其未来应用的可能性。具体研究内容如下：(1)采用磁控共溅射的方法在p-Si(100)衬底上沉积了CDH薄膜,研究了不同Ce含量和溅射过程氧分压对于CDH薄膜电学性能的影响。通过XPS对比发现相对于纯Hf02薄膜,CDH薄膜的组分更符合标准的化学计量比,体系中氧空位有所减少,证明Ce的掺入能够抑制氧空位的产生。对Pt/CDH/Si MOS结构进行电学特性表征,结果显示CDH薄膜在Si衬底上具有良好的电容特性,介电常数可达20以上；电流-电压(I-V)测试结果表明CDH薄膜具有较低的漏电流,比纯HfO2薄膜低了两个数量级,满足栅介质材料应用的要求。此外,Ce掺杂量的改变以及溅射过程氧分压对于薄膜电学性能也存在明显影响。(2)在p-Si(100)衬底上利用磁控共溅射技术沉积了GDH薄膜,在NH3气氛下GDH/Si栅堆栈结构进行快速热退火,研究GDH/Si栅堆栈结构的热稳定性以及不同退火温度对于GDH薄膜性能的影响。结果显示GDH薄膜具有较好的热稳定性,在900℃左右依然保持非晶状态；快速热退火(RTA)后薄膜中氧空位数目减少,GDH薄膜与Si衬底界面区域硅酸盐及不完全氧化SiOx含量降低；GDH/Si栅堆栈结构在RTA后漏电流下降了两个数量级,饱和电容值增大,C-V窗口回线宽度缩小。随退火温度的上升,栅堆栈结构的漏电流呈现先降低后升高的趋势,栅堆栈结构的饱和电容值呈上升趋势,C-V曲线回滞窗口宽度逐渐缩小,C-V曲线逐渐向正向漂移。(3)研究了磁控溅射法制备的HfO2薄膜与InP衬底间的界面,包括其界面处化学信息与能带结构。利用XPS对HfO2/InP栅堆栈结构进行研究发现,HfO2/InP的界面处存在着In203和InPO4,是O原子扩散到界面处与衬底发生反应形成的；In原子和P原子没有向Hf02中扩散。HfO2/InP在有无界面层影响时能带结构存在明显的差异：在有界面影响的情况下,由价带谱得出HfO2相对于InP的价带偏移△Ev的值为3.43eV,计算得出导带偏移量△Ec为1.11eV；在无界面影响的情况下,由价带谱和In3d、Hf4f芯能级谱得出△Ev为1.99eV,计算得出△Ec为2.55eV。(4)采用磁控溅射的方法在InP(100)衬底上沉积了GDH薄膜,对薄膜的界面及界面处的能带结构进行了分析,研究了结构为W/GDH/InP/Ni的MOS结构的电学特性。HRTEM结果显示GDH薄膜与InP衬底间并无明显的界面层,仅是在衬底靠近界面位置的部分区域有几个原子层发生了反应。XPS分析发现InP与扩散至衬底的O元素发生反应生成了InPO4;但与纯Hf02薄膜比较,GDH薄膜中O扩散的现象有所缓和。利用XPS对GDH/InP堆栈层界面处的电子结构进行研究,得出GDH/InP的价带和导带偏移量分别为2.1eV和2.61eV。W/GDH/InP/Ni的MOS结构具有优异的电学性能,包括适中的介电常数(k～16)以及很小的漏电流(栅压为-1V时仅有10-SA/cm2)。GDH与InP衬底存在的较大的价带和导带偏移为其应用展现了广阔前景。在未来的集成电路中具有潜在的应用价值。(5)分别采用磁控溅射和ALD的方法在热氧化的Si(100)衬底上沉积了更高介电常数的HfTiO薄膜,研究了其漏电流-电压特性以及电容-电压特性,并对比了不同Ti含量以及后续RTA处理对于HfTiO薄膜电学特性的影响。结果显示：磁控溅射法制备的HfTiO薄膜介电常数均在40以上,相应的MOS结构的漏电流密度在10-7～10-6A/cm2之间(栅压为-1V时),且随Ti含量的上升,磁控溅射法制备的HfTiO薄膜的饱和电容值呈上升趋势,HfTiO/SiO2/Si栅堆栈结构的漏电流相应的有所下降；ALD法制得的HfTiO薄膜的介电常数约为30左右,界面缺陷要明显少于磁控溅射法制得的薄膜,且随退火温度的上升,样品的饱和电容有所下降。RTA处理后C-V曲线的回滞窗口明显变窄,曲线向负栅压方向偏移的现象有明显改善,C-V曲线的积累区平台也有所增长。更多还原

【Abstract】 With the rapid development of ultra-large scale integrated circuit, the traditional SiO2-gate dielectric has reached its limitation. It is necessary to employ alternative high dielectric constant(high-k) materials. However, some problems follows with the application of high-k gate dielectric, such as high defect density, poor-quality interlace, thermal unstability of high-k/substrate gate stack and so on. Moreover, high speed devices require new channel materials with higher carrier mobility. Ⅲ-Ⅴ group semiconductors have attracted more and more attention. Additionally, new gate dielectrics with higher k (k>30) are demanded for IC application at16nm technology node and beyond. In this paper, CeO2-HfO2(CDH), Gd2O3-HfO2(GDH), HfTiO are selected as gate dielectric materials. Magnetron sputtering or atomic layer deposition (ALD) is employed to deposite high-k oxides on Si or InP substrates. Structure characterizations and electrical properties of these systems are investigated. The main contents of the research are as follows.(1)CDH films are grown on p-type Si(100) by magnetron sputtering. The influence of O2/Ar ratio during deposition and Ce content on the electrical properties of CDH film has been investigated. XPS indicates that CDH film has fewer oxygen vacancies, confirming that Ce doping can help suppress the generation of oxygen vacancy. Pt/CDH/Si MOS capacitor has tower leakage current density and higher maximum accumulation capacitance than Pt/HfO2/Si MOS capacitor. The k value of CDH film is about20, indicating broad prospects for high-k gate dielectric. Additionally, the content of Ce in CDH film and the O2/Ar during deposition also affect the electrical properties of CDH film.(2)GDH films are grown on p-type Si(100) substrate by magnetron sputtering. The GDH/Si gate stack shows significant thermal stability in NH3atmosphere. According to HRTEM images, GDH film keeps amorphous after900℃annealing. GDH film with rapid thermal annealing (RTA) has fewer oxygen vacancies. The content of interfacial silicates and SiOx decreases after RTA. GDH film with RTA has better electrical properties. The leakage current is two orders of magnitude lower and the maximum accumulation capacitance rises. Additionally, the width of hysteresis windows reduces obviously. The effect of NH3annealing temperature on the electrical properties of Pt/GDH/Si MOS structure are investigated. The results show that the leakage current firstly decreases and then increases with the rising temperature. The C-V characteristic performs better at high annealing temperature, including higher maximum accumulation capacitance and a narrower hysteresis window.(3)HfO2film is deposited on p-InP(100) substrate and the chemical states and band alignment of HfO2/InP interface are studied. XPS analysis shows that there are interfacial In2O3and InPO4, which are the products of the reaction between diffused O atoms and InP substrate. In3d and Hf4f core level spectra and valence spectra are employed to obtain the valence band offset of HfO2/InP. A comparison of band structure is made between thick HfO2film without the influence of interface and thin HfO2film with the influence of interface. For thick HfO2film, experimental results indicate that the5.88±0.05eV band gap of HfO2is aligned to the band gap of InP with a conduction band offset△Ec of2.55±0.05eV and a valence band offset△Ev of1.99±0.05eV. For thin HfO2film, the conduction band offset is1.11eV and the valence band offset is3.43eV.(4)GDH film is deposited on p-InP(100) substrate. The interface chemical states and band alignment are investigated and the electrical properties of W/GDH/InP/Ni MOS structure are characterized. HRTEM results illustrate that there is no obvious interface layer between GDH film and InP substrate. XPS shows that O atoms diffuse less in GDH film than in pure HfO2film and thus the generation of interfacial In2O3is suppressed. The6.05±0.05eV band gap of GDH is aligned to the band gap of InP with a conduction band offset△Ec of2.61±0.05eV and a valence band offset△Ev of2.1±0.05eV. W/GDH/InP/Ni MOS capacitor exhibits good electrical properties, including dielectric constant of16and leakage current density of10-5A/cm2(gate voltage at-1V).(5)Higher-k HfTiO film are deposited on thermally oxidized Si(100) substrate using magnetron sputtering and ALD respectively. The electrical characteristics of Pt/HfTiO/SiO2/Si are investigated. The influence of Ti content and RTA on the electrical properties of HfTiO films are studied. Both magnetron-sputtered HfTiO films and ALD-deposited films show high dielectric constant (k>30), but ALD-deposited film has a lower interfaces state density. With the increase of Ti content, the maximum accumulation capacitance rises and the leakage current decreases. After RTA, although the maximum accumulation capacitance becomes smaller, the hysteresis becomes narrower.更多还原