【作者】 姜子运；

【导师】 王思明；

【作者基本信息】 兰州交通大学 ， 系统分析与集成， 2010， 硕士

【摘要】 静电除尘器(ESP)具有除尘效率高、运行及维护费用低廉、适应性强的特点,因此被广泛应用于电力、水泥、冶金等工业领域,在大气污染的治理和生态环境的保护方面做出了显著的贡献,但是沥青烟气净化ESP普遍存在着除尘效果不理想,过度依赖手动调节参数等问题。在对用于沥青烟气净化的ESP所存在的问题做了深入分析的基础上,介绍了基于现场可编程门阵列(FPGA)硬件平台的智能型ESP高压电源主控制器的设计,主要工作如下所述：(1)根据ESP电源控制器的需求制定了以FPGA为核心处理器的整体实现方案,该控制器不仅可以实时地显示各种运行状态及故障信息,还设计了RS485通信接口,为实现ESP的集散控制提供了必要的条件。(2)基于Protel设计了控制器的板级电路原理图,并详细分析了ESP运行参数的特点和硬件资源需求情况,对系统中的主要芯片进行了选型设计。(3)在QuartusⅡ集成开发环境下进行了控制器的接口逻辑电路和功能模块逻辑电路的设计工作,并对设计的所有模块进行了仿真验证。对火花放电信号的准确判断和及时处理是决定ESP电源控制器控制性能的关键因素。尽可能的抑制火花状态的发生,可以确保ESP取得较高的除尘效率,不仅有效的节约了电能,也保证了设备的安全。因此本文从以下四个方面着手重点解决影响ESP性能的火花放电问题：(1)分析了ESP二次电压闭环控制的特点,将带死区的积分分离增量式数字PID用于二次电压的闭环跟踪,该算法在保证响应速度的同时又避免了超调的发生,可以实现对火花的有效抑制。(2)基于BP神经网络实现火花放电信号预测,通过神经网络对ESP历史运行参数的学习,计算出ESP下一时刻的运行参数值,从而得到ESP的运行状态预测值。并针对该模型存在计算量大的问题,在分析了ESP运行参数特点的基础上,将运行参数聚类中心作为神经网络预测模型的预处理层,从而大幅降低计算量,确保该算法在嵌入式NiosⅡ处理器中的运行时间满足系统需求。Matlab仿真结果表明该模型可以准确地预测出火花信号,是实现浮动火花跟踪控制的有效途径。(3)基于FPGA逻辑电路实现火花放电信号的检测,这种硬件电路的检测手段保证了火花检测的及时、准确。(4)采用二折线火花跟踪算法实现精确的火花响应,而且基于FPGA硬件电路实现的二折线算法控制模块也保证了对火花状态的及时响应。更多还原

【Abstract】 With high efficiency, low operation cost and good adaptability, electrostatic precipitator (ESP) is widely used in plant, cement, metallurgy and other industries, has made significant contribution on pollution control and environmental protection. But there are several problems of ESP which applying in asphalt purify, for instance can’t get ideal purify result and over-dependent manly adjust, and so on.Analyzed the problems of ESP which used for purifying asphalt gas, an intelligent controller based on Field-Programmable Gate Array (FPGA) is introduced, addressed to solve spark discharge problem which has huge influence on ESP’s performance. The mainly work is shown as following.(1) According to the function requirements of the ESP supply controller drawn the overall control program with FPGA as the mainly processor. The controller can timely display all kinds of states and faults information, and has RS485 communication interface, which is necessary condition for ESP distributed control system.(2) Selected key chip for the system according to the characteristic of ESP parameter and hardware source requirement. And the circuit schematics are designed based on Protel software.(3) Designed all interface logic circuits and functional logic circuits based on Quartus II integrated development Environment, and each module has passed the simulation, can obtain desired function.Accurately judgment and timely treatment of spark are the key factor of the supply controller. To suppress spark as much as possible, ESP can have higher efficiency under different conditions, not only save energy, but also ensure the facility’s safety. In this thesis the following four measures to solve the spark signal suppression problem.(1) Analyzed the feature of ESP’s secondary voltage closed-loop control, an incremental digital PID which have dead-zone and integral separation is introduced to the controller, the algorithm will achieve quickly response and avoid overshoot, can suppress spark discharge efficiently.(2) A spark signal prediction model based on neural network is provided, through studied the historical operating parameters of ESP then calculated the prediction operating parameters, thereby get the prediction state. After analyzed the characteristics of ESP’s operating parameters, an improved neural network prediction model which including a cluster centers layer is introduced, it can significant reduce the calculation, ensure the prediction algorithm can be successfully transplanted into embedded microprocessor Nios II, and the running time satisfied the system requirement. The simulation of Matlab demonstrated that the model can accurately predict spark signal, is an effective way of float spark track control.(3) Spark discharge signal detection module is designed on FPGA, the detection measurement which based on hardware circuit can ensure spark signal is detected timely and accurately.(4) Two-broken-line tracking algorithm is provided to maintain accurately spark response, and the two-broken-line tracking module which is designed on FPGA hardware circuit can ensure the response in time.更多还原