【作者】 钟花；

【导师】 景晓军；

【作者基本信息】 北京邮电大学 ， 通信与信息系统， 2010， 硕士

【摘要】 LDPC码由Gallager于1962年首次提出,只是限于当时的技术发展水平这方面的研究在接下来的30多年里沉寂了,直到上世纪九十年代中期,Mackay, Neal等人重新发现LDPC码与Turbo码一样也是一种能够逼近香农限的非常好码,过去几年LDPC码有了很大发展。本文以欧氏几何空间、循环码、线性分组码为理论背景对LDPC码做了研究,并设计了DVB-S2标准中LDPC编码在硬件FPGA匕的实现方案。主要工作如下：1.研究了LDPC码奇偶校验矩阵的构造方法,基于置信度传播的译码算法,一般编码算法和快速编码算法。重点研究了欧氏空间LDPC码和基于奇偶校验矩阵编码的算法。2.设计了构造第一类二维循环(2,0,s)阶EG-LDPC码的的具体实现步骤；提出一种直接从奇偶校验矩阵经过简单计算即可获得循环EG-LDPC码的生成多项式的方法。3.设计了构造第一类多维准循环(m,0,s)阶EG-LDPC码的的具体实现方法,提出基于准循环矩阵实现q(q>2)进制LDPC编码的思路,并给出了硬件编码电路。4.针对LDPC码通用编码算法的复杂度与码长的平方成正比的问题重点研究了LDPC码的快速编码方法。根据DVB-S2标准中给出的LDPC码的奇偶校验矩阵为非规则校验矩阵,此矩阵可以看成由一个稀疏矩阵和一个双对角线矩阵组成,符合利用校验矩阵直接进行编码的条件,并且编码复杂度为线性。给出了在FPGA上实现的编码器的方案,针对设计中的乘法运算提出了累加的改进方法,节约了存储空间,利用硬件描述语言完成了编码器设计。更多还原

【Abstract】 The Low Density Parity-Check (LDPC) code was first proposed by Gallager in 1962, of which the research had been halted due to constraint of the technology development in the following more than 30 years. In the 1990s, Mackay and Neal found that LDPC is one kind of good codes as well as turbo and near to Shannon limit. Based on this discovery, the research about LDPC has grown and got a big development in the past several years.Based upon Euclidean Geometry, Cyclic codes and linear block codes scheme, this dissertation is trying to research on LDPC and presenting a proposal, for how to implement the LDPC encoder on hardware according to DVB-S2 standard. The details are as below:1. The structure method of LDPC parity check matrix has been studied in detail, as well as belief-propagation decoding algorithms, general encoding and fast encoding algorithms. Euclidean geometry LDPC and encoding algorithms based on the parity check matrix are mainly researched.2. A new method for constructing the first class 2-dimention (2,0,s) order EG-LDPC is presented; and a new method for getting generated polynomial from parity check matrix of cyclic EG-LDPC by simple calculation is proposed.3. A method for constructing the first class multi-dimension (m,0 s) order cyclic EG-LDPC is presented; and an implementation of non binary LDPC encoding from QC-LDPC is proposed, with the hardware encoder circuit introduced.4. On the question that the complexity and the quadratic of code length are proportional by general algorithms, the fast encoding method of LDPC is mainly studied. An encoder is presented on FPGA with hardware language according to DVB-S2 standard. The LDPC parity check matrix in DVB-S2 standard is irregular and is composed of one sparse matrix and one double diagonal matrix and has condition to be encoded directly in linear time. By corrective method of accumulation to replace multiply operation, the proposal gives a method to save memory space.更多还原