节点文献

同构多处理器片上网络互连的设计

Design of Network-on-chip for Homogeneous Multi-processors

【作者】 梅南翔

【导师】 付宇卓;

【作者基本信息】 上海交通大学 , 计算机系统结构, 2010, 硕士

【摘要】 集成电路工艺的发展,使得单块芯片上的处理资源越来越多,由于功耗与性能方面的考虑,处理资源的分配由原来的少数几个强大的核向众多小核演变,再加上全局连线在亚深微米下的延时与功耗问题,总线这种互连变得不再合适。片上网络将宏观网络中数据包交换与路由机制引入到单块芯片上,用于众多IP核的互连,它具有可扩展性好、结构规整、模块性好等优点,再随着3D IC工艺的发展,成为一种广泛研究的技术。本课题设计了同构多处理器与片上网络互连的接口,建立了一个以片上网络互连的多处理器系统。主要研究了在片上网络互连的多处理器系统中,如何解决内存成为系统性能瓶颈的问题。课题将分布式共享内存的概念运用到片上网络中,并通过一些软件的方法进行针对这一结构的优化配置,最后在多线程程序的测试中,观察到了性能提升和网络吞吐率的增加。

【Abstract】 As the development of IC technology, the processing resources on a single chip become more and more. Because of the relationship between power and performance, those processing resources are more and more likely to be divided into many small cores, rather than several strong cores. Also, in Deep Sub-Micro (DSM) process, global wires face delay and driving loads problems, thus the conventional bus interconnection becomes unsuitable for future System on Chip interconnection.Network on Chip adopts data packet switching and routing techniques on a single chip, and was designed for many IP cores interconnection. NoC has advantages of extensibility, regularity and modularity. Along with the 3D IC’s development, it becomes a widely researched topic.After designing a network adapter for a NoC, This thesis first established a network-on-chip connected multi-processor system, and then researched on how to avoid that the memory becomes performance and throughput bottleneck.We applied the Distributed Shared Memory architecture on NoC connected Multi-processor, and did some optimization in software way. This design had showed improvemence of performance and throughput in a final muti-threaded benchmark.

节点文献中: 

本文链接的文献网络图示:

本文的引文网络