【作者】 付芳芳；

【导师】 易清明；

【作者基本信息】 暨南大学 ， 信号与信息处理， 2010， 硕士

【摘要】 随着集成电路设计规模和复杂度的不断增大,验证工作越来越重要,往往占到整个开发周期的70%,验证也越来越困难,成了现代数字开发周期的瓶颈。如何快速地搭建一个强大、高效的验证平台是工程师们关注的重点。本文对IC验证方法学进行了研究,并对AVS视频解码芯片进行了高效的验证。本论文研究了业内常用的高级验证方法学RVM(Reference Verification Methodology)、VMM (Verification Methodology Manual)、AVM (Advanced Verification Methodology)和OVM (Open Verification Methodology),并介绍了常用的验证语言。之后,基于RVM验证方法学,本文利用Vera验证语言搭建了一个层次化验证平台,对AVS视频编解码芯片进行验证。Vera验证完成后,采用Xilinx公司的Virtex-5系列的FPGA芯片xc5vlx220作为目标芯片,对AVS解码器进行FPGA验证。本设计中,AVS视频解码芯片的Vera验证一共开发测试用例2400多条,覆盖率也已达到项目要求,其中行覆盖率为99.2%,条件覆盖率为95%,状态机覆盖率是98.1%,跳转覆盖达95.2%,且平台可重用性较好。验证结果表明,经FPGA验证处理后的图像数据用matlab’恢复出正确解码图像,且PSNR为27.2dB,图像质量较高,说明本解码芯片解码效果较好。同时测试结果也证明,采用Vera与FPGA可以准确高效地对芯片进行验证。更多还原

【Abstract】 Verification for digital design is more and more important as the increasing of design scale and complexity of integrated circuit, even reaches 70% of the development cycle. It is also more and more difficult and becoming the bottleneck of the digital development. The engineers are focusing on how to build a powerful and efficient verification platform. With this reason, the IC verification methodologies are studied and the AVS video decoder is verified in this paper.The common senior verification methodologies are studied in this paper, including RVM (Reference Verification Methodology), VMM (Verification Methodology Manual), AVM (Advanced Verification Methodology) and OVM (Open Verification Methodology). The common verification languages are also introduced. Then, based on RVM, a hierarchical verification platform is built with Vera to verify the AVS video decoder. When it is finished, the FPGA (field-programmable gate array) verification for AVS video decoder is accomplished on the FPGA chip xc5vlx220 of Xilinx Company. In this paper,2400 test cases are developed for AVS video decoder, the code coverage fulfills the requirements of project, the line coverage is 99.2%, the condition coverage is 95%, the fsm coverage is 98.1% and the toggle coverage is 95.2%. The reusability of the platform is fine.The image data that is processed by FPGA can be converted into significative images. A high PSNR of this 720*576 image with the block size 8×8 is obtained, which is 27.2dB and illustrates the decoded image has high quality. It indicates that the decoder has a good performance. The results show that using Vera and FPGA can verify the ASIC (Application Specific Integrated Circuit) efficiently and accurately.更多还原