【作者】 石云中；

【导师】 张翠芳；

【作者基本信息】 西南交通大学 ， 信号与信息处理， 2010， 硕士

【摘要】 在设计高性能Loran-C数字接收机过程中需要能模拟各种干扰环境下的Loran-C脉冲信号的发生器,利用传统的模拟或数字电路产生Loran-C脉冲信号,存在着实现困难、误差较大、不易调整和难于叠加环境干扰信号的缺点。随着现代电子技术和VLSI技术的发展,利用大规模可编程门阵列(FPGA, Field Programmable Gate Array)与直接频率合成技术(DDS, Direct Digital Synthesizer)相结合可以极大地提高函数发生器的性能,降低开发难度。为此,论文在详细研究前人在Loran-C信号模拟源的研究和设计的基础之上,研究了FPGA和DDS相结合的技术,并以此进行了Loran-C信号发生器的设计与实现。论文以利用FPGA和DDS技术相结合的方式设计实现Loran-C信号发生器为主要内容。首先,简要介绍了Loran-C无线电导航系统和DDS技术的国内外研究现状和研究意义,接着详细阐述了Loran-C系统的数据结构和DDS技术的基本原理。然后,在分析信号发生器的设计要求的基础上,确定了本信号发生器采用以FPGA为核心处理器构架的方案,并基于FPGA+DSP构架实现了该信号发生器。其中FPGA芯片选用的是Xilinx公司Virtex-5系列的XC5VSX50TFF665,作为信号模拟源的信号发生器完成Loran-C信号波形的合成与台链信号的控制逻辑生成；DSP芯片选用TI公司TMS320C6713作为主控器,完成对时间信号根据Loran-C信号报文格式进行编码传送到FPGA以控制Loran-C台链信号的发生。在硬件设计时,论文给出了信号发生器的总体框图并详述了信号发生器的工作原理以及选用的主要芯片的特点和硬件系统中主要模块的设计,使用PADS2005设计了信号发生器的硬件原理图并绘制了PCB图,在利用PADSLogic软件完成系统的原理图设计之后,利用HyperLynx7.5对系统重要高速信号线进行仿真,证明了系统原理图设计是正确可靠的,确保了硬件设计正确实现。论文的最后根据Loran-C脉冲信号的波形理论采用DDS技术在信号发生器上设计实现了一个Loran-C脉冲信号发生模块并产生了标准的Loran-C脉冲信号。更多还原

【Abstract】 A high performance Loran-C signal generator which can generate Loran-C signals include noise and all kind of interference is needed at the process of design digital Loran-C receiver, the capability of Loran-C signal generator by using traditional analog or digital electrocircuit exist many disadvantage such as diffcult to realize, biggish error in resolving capability, hard to adjust and add noise and environment interference. With steady advances and development in modern electronic technology especially very large scale integration technology (VLSI), the capability of signal generator by using Field Programmable Gate Array (FPGA) combined with direct digital synthesizer (DDS) technique will be improved greatly and the difficulty of designing will be reduce|d observably.So based on the research and design previous, firstly design Loran-C signal generator adopt FPGA combined with DDS technique.This paper is focused on the design of Loran-C signal generator based on FPGA combined with DDS technology. Firstly, it introduces the development history of the Loran-C System and DDS technique. Secondly, it introduces the data structure of Loran-C system, and then it introduces the basic theory of direct digital synthesizer technique.Furthermore, this paper introduces the construction of the design which is based on Xilinx Inc high performance FPGA according to the requirement of the signal generator, and the system is implemented based on the DSP and FPGA co-processing. The design chooses Xilinx Inc Virtex-5 family FPGA-XC5VSX50TFF665 as signal generator to generate Loran-C signal and its control logic, and chooses TI Inc TMS320C6713 as central controller to code the time information according to the code structure of Loran-C sent to FPGA used to control the generation of Loran-C datalink signals. For the hardware circuit design of the system, the paper presents the conceptual frame of the signal generator and expands the principle of the signal generator, and expatiates that the main chips used in the signal generator and the main modules of hardware circuit, the designs of the hardware scheme circuit and the PCB of the system board is based on PADS2005, and simulate the signal integrity of the significant signal wires after accomplished the hardware scheme circuit which proves the correctness of the hardware scheme circuit.At last, the Loran-C signal generation module based on DDS is realized according to Loran-C signal generation theory and the debugging results are given.更多还原