【作者】 马自姣；

【导师】 郭炜；

【作者基本信息】 天津大学 ， 计算机软件与理论， 2009， 硕士

【摘要】 随着数字多媒体技术的发展,需要在更便宜和通用性更强的产品中集成更多的功能。嵌入式处理器是多媒体SoC芯片的核心。可定制的传输触发体系结构(Transport Triggered Architecture, TTA)处理器,作为IP核的形式开发,允许用户实现总线宽度、寄存器数量、指令集等的可配置和定制执行单元,做到功耗面积性能的最佳折中,在多媒体SoC设计中具有广阔的应用市场前景。而指令集仿真器是当今处理器设计及软件工程领域非常重要的一部分。它在已有的计算机系统上为开发中的处理器构造一个模拟平台,验证处理器的正确性和有效性,支持目标程序的运行和调试。硬件设计者用仿真器来评估目标处理器的性能,修改体系结构中的瓶颈。系统开发者用仿真器来开发编译器和操作系统,开发和测试他们的应用程序,实现软硬件协同开发。所以,实现可重定向的指令集仿真器在体系结构开发、早期系统识别以及软件逆向分析方面更占据不可或缺的地位。本论文详细介绍了在法国TIMA Lab提供的Soclib电子系统级(Electronic System Level,ESL)设计硬件仿真平台上对TTA架构处理器的指令集仿真器的设计。总结了基于TTA架构的处理器指令集仿真器事务级建模(Transaction Level Model, TLM)的一整套方法。采用面向对象的设计技术,用SystemC高级语言设计实现了面向TTA架构的可重构处理器的周期精确及比特精确的指令仿真器。本论文给出的指令集仿真器,是基于TTA架构处理器进行嵌入式ASIP(Application Specific Instruction-set Processor)设计过程中所需的一个非常重要的工具。通过读取系统架构描述文件并进行解析,在已有的硬件功能单元描述库中选取相应的功能单元描述,搭建成所对应的体系结构,并在此体系结构上对不同的应用程序进行周期精确炜精确的仿真模拟。对于用户自定义的指令及功能单元,也可以通过提供的宏定义接口加入到仿真器中。最后,集成到soclib仿真平台上搭建了Soc平台,进行了测试和验证。实验结果证明了本论文给出指令集仿真器ESL设计方法的正确性,并且实验结果显示本论文设计的TTA架构处理器的指令集仿真器,对硬件设计者和系统开发者都有较强的实用性。更多还原

【Abstract】 With the development of digital multimedia technology, the cheaper and more generic products need more integration functionally. Embedded processor is the central of multi-media SoC chips. Customizable TTA processor, developed as a form of IP, allows the user to configure the bus width, the number of registers, instruction set, etc, and allows the user to customize the function Unit as well to make area-power performance to achieve the best compromise. And in today’s processor design and software engineering, instruction set simulator is a very important part of the field. It can construct a simulation platform for the development of the processor on the computer systems available, to verify the correctness and effectiveness of the processor and to support the run and debug procedures of the target program. Hardware designers make use of to simulator assess the performance of the target processor and modify the structure of the bottlenecks in the system. System developers exploit emulator to develop compilers and operating systems, develop and test of their applications to achieve synergy of hardware and software development.Therefore, the implementation of retargetable instruction set simulator occupy an indispensable position in the early system development, identification, and software reverse analysis.In this paper, the design of TTA processor instruction set simulator, which based on the hardware simulation platform Soclib provided by TIMA lab in French, in detail.Summarized a whole set of design methodology for Transaction Level Modeling of TTA processor instruction set simulator.And implemented the cycle-accurate bit-accurate instruction set simulator of TTA reconfigurable processors designed with high-level language SystemC, using Object-oriented design techniques. The given instruction set simulator in this paper,is a very important tool for the design process of embedded processors ASIP based on TTA.By reading and analysising a architecture description document, select the corresponding functional unit description in the functional unit description library, then construct the corresponding architecture,and to carry one cycle-accurate for different applications simulation in this architecture. For user-defined unit can also add to the simulator in a simple way.Finally, we built SoC platform on soclib simulation platform, and carried on testing and validation. The experimental results proved the validity of the given instruction set simulator, and experimental results show that the TTA processor instruction set simulator has a strong practicality not only for hardware designers but also for system developers.更多还原