【作者】 桑坚；

【导师】 王明江；

【作者基本信息】 哈尔滨工业大学 ， 微电子学与固体电子学， 2008， 硕士

【摘要】 随着信息技术的发展,视频处理技术在日常生活、工业、医疗和军事等许多领域得到了广泛的应用。由于各种视频处理系统的应用领域及所实现的功能不尽相同,所用到的视频处理平台也存在着很大差别,所以建立一种通用的视频处理平台,并在此平台上根据不同的需求做进一步的开发,已经成为设计视频处理平台的重要途径。TI公司的TMS320DM642芯片是目前业界公认的性能良好的视频处理器,是一款专门面向多媒体应用而设计开发的32位定点DSP芯片,它良好的处理性能和丰富的片上外设,可以很好的满足视频信号处理的要求,因此,TMS320DM642成为目前视频处理系统的理想平台之一。本文研究了视频处理系统的发展和实现方法,完成了基于TMS320DM642系统的硬件设计。本设计以高速DSP芯片为核心处理器,FPGA为信号的协处理器。FPGA协处理器实现音视频时序同步、接口电路、及部分硬件编码解码过程,DSP芯片完成大部分信号算法处理。论文中给出了DSP硬件外围电路的详细设计,完成了TMS320DM642处理系统的程序设计,包括片内外设配置、系统初始化、EMIFA控制寄存器配置、IIC模块配置、EDMA控制寄存器配置。完成了TMS320DM642通过IIC接口对视频编码芯片的寄存器的配置和校验。最后,本文基于FPGA实现了主模式的SPI接口总线。系统实现了音、视频信号的输入,并为音视频编解码算法验证搭建了一个高性能的平台。更多还原

【Abstract】 With the development of information technology, video technology has been widely applied in daily life, including industry, medical military and so on. There are a lot of differences among the video processing platforms because of different application fields and function. So developing a universal video processing platform and doing further development on it according to various requirements has become a significant way of video processing platform design.The TMS320DM642 is considered to be a Digital Media Processor with excellent performance at present, it is a 32-bit fixed-point DSP which is developed for multimedia applications.It meets the demand of video processing with its good processing performance and abundant on-chip peripherals.So TMS320DM642 has become one of the perfect platforms for the video processing system currently.This paper studies the development and implementation of the video processing system, and focuses on the hardware design based on TMS320DM642. The DSP chip works as the core processor at high speed, FPGA works as the coprocessor. FPGA handles video and audio signals, including timing alignment, interface circuits and some of the hardware codec, DSP chip processes other algorithms. In the paper, the detailed design of the external circuit for the DSP hardware is completed, and the system programming for TMS320DM642, including on-chip peripherals configuration, system initialization, EMIFA control register configuration, IIC module configuration and EDMA control register configuration is writen. The configuration and verification of internal registers for the video encoding chips is implemented through the IIC interface. Finally, the master mode of the SPI bus interface is realized based on the FPGA. This system provides an audio and video input, as well as a high-performance hardware platform for audio and video codec algorithm’s verification.更多还原