【作者】 张雪松；

【导师】 张庆祥；

【作者基本信息】 哈尔滨工业大学 ， 信息与通信工程， 2008， 硕士

【摘要】 数字信号处理是信息科学中近几十年来发展最为迅速的学科之一。目前,数字信号处理已经广泛应用于通信、雷达、声纳、语音与图像处理等领域。而离散傅立叶变换(DFT)作为数字信号处理中的基本变换,发挥着重要作用。但是由于离散傅立叶变换(DFT)的运算量太大,在提出之后的一段时间内并没有在实际工程中得到应用,直到快速傅立叶变换(FFT)算法的提出,减少了当N很大时的DFT运算量,才使得DFT在实际工程中得到具体的应用,这也进一步推动了数字信号处理技术的发展。FFT算法从出现到现在已经有四十多年的历史,算法理论已经趋于成熟,具体实现方法也不断的更新。在面向高速、大容量数据流的FFT实时处理时,可以通过数据并行处理或者采用多级流水线结构来实现。本文分析了离散傅立叶变换及其快速计算方法FFT。对实际中常用的四种用来实现FFT处理器的硬件电路结构进行了介绍,分析了各自的特点。根据算法的特点和硬件结构实现的难易,选择了按时间抽取法中的基-2 FFT算法和流水线工作方式的硬件结构来设计FFT处理器,这样结构在一定程度上提高了FFT处理器的处理速度,而且设计中采用IEEE单精度规格化浮点数的数据形式进行计算提高了计算的精度。选用XILINX公司的Virtex II系列FPGA芯片中的XC2V8000,在ISE 7.1设计平台中使用Verilog HDL硬件描述语言设计流水线工作方式的FFT处理器,计算数据长度为1024点。最后使用MATLAB计算软件对设计的FFT处理器进行了测试仿真,并对FFT处理器运算结果和MATLAB中FFT计算的理论值进行了对比,计算误差。仿真结果表明其计算结果达到了单精度浮点数的要求,运算速度可以满足实时信号处理的要求。更多还原

【Abstract】 Digital Signal Processing is one of the subjects expanding rapidly in the field of information science during the past several decades. At present, it has applied extensively in many subjects such as communications, radar, sonar, speech and image processing etc. Discrete Fourier Transform (DFT) plays a very important role in Digital Signal Processing as the basic calculation. But it was not widely used in actual project because of its tremendous amount of computing. Until the arithmetic of Fast Fourier Transform was presented which reduces the calculation quantity when N is a little great, the DFT arithmetic is widely used in actual project. It also further promotes the Digital Signal Processing technology development. It has been more than forty years since FFT arithmetic firstly presented, the theory of FFT arithmetic is much mature today, and the method of how to implement has been updated too. The real-time computation of FFT with high-speed and large capacity of data flow can be implemented by parallel data processing or multi level pipeline processing.This article has a detailed analysis of Discrete Fourier Transform and its rapid calculation method Fast Fourier Transform -- FFT. I introduce four hardware structures and analyze the characteristic of each hardware structure which were common used to implement FFT processor. According to the algorithm and the difficulty to implement it in hardware, I choose Decimation-In-Timer radix 2 FFT algorithm and pipeline hardware structure which can improve the processing speed to design the FFT processor on the FPGA chip XC2V8000 of Virtex II made by XILINX . And the data form in the calculation is IEEE single-precision floating-point standardized form which can increase the accuracy of the calculation. I use Verilog HDL hardware description language to design the FFT processor which works in pipeline form in design platform ISE 7.1, and the points in calculation is 1024.Finaly I simulate the design in MATLAB software and compare the results of the FFT processor with the academic results calculated in MATLAB and calculate the errors. The simulation indicates that the result of calculation can reach equivalent precision and the operation speed of FFT can satisfy the request of commonly real— time signal processing.更多还原