【作者】 程汉强；

【导师】 方粮；

【作者基本信息】 国防科学技术大学 ， 电子科学与技术， 2008， 硕士

【摘要】 近些年来,虚拟化技术由于其突出的优点受到工业界和学术界的共同关注和重视,但是虚拟化技术会带来额外性能开销,特别是对于偏重于I/O访问的任务。如何切实提高I/O虚拟化的效率,尤其是对于基于Many-Core处理器平台虚拟化系统而言,是一个亟待解决的问题。硬件辅助I/O虚拟化技术,支持客户操作系统在几乎没有虚拟机监控器干涉下,安全可靠的直接进行I/O设备访问,因而能够避免大量的虚拟化开销。目前,硬件辅助I/O虚拟化技术被认为是解决I/O虚拟化的最基本措施。本文结合实际的工程任务需要,在处理器的PCIE总线接口层设计实现了一种面向多核架构的硬件辅助虚拟化系统。针对基于多核架构虚拟化系统IO访问频繁,可靠性要求高的特点,该设计从DMA访问、I/O中断处理和PIO访问3个方面着手进行专门设计。对于DMA访问,通过增加IO空间映射,优化了IO TLB缓存组织结构以及采用预取技术来实现设备DMA访问过程安全可靠以及高效性;对于I/O中断处理,则采取芯片内直接集成中断映射表加速中断重映射过程,采用基于事件队列异步中断处理机制处理主要的I/O中断——MSI中断,加速了该中断的处理并且减少该中断处理对CPU工作的影响;对于PIO访问,则采用Tag分配与记分牌相结合的管理机制,确保了所有的PIO访问可靠性以及PIO数据的正确返回。本文还针对多核处理器上运行的虚拟化系统需要频繁地进行共享设备访问,而现有的硬件辅助I/O虚拟化不支持共享设备直接访问的缺点,在PCIE总线接口层内实现了一种硬件辅助的自虚拟化结构,允许多客户操作系统,在几乎没有虚拟机监控器的干涉下,直接访问共享设备,有效的提高了虚拟化系统对共享设备访问的效率。与已有的硬件辅助的自虚拟化技术相比,该结构具有硬件实现代价低,可灵活配置性等优点。更多还原

【Abstract】 Recently, Virtualization Technology appeals the common interests of both the industry and academy due to its obvious advantages. However, it also encounters the problem of serious performance overheads, especially for the I/O-intensive workload; therefore it is an urgent task to solve the performance overheads caused by I/O virtualization, particularly for the virtualization systems based on many-core processor. The hardware-assisted I/O virtualization Technology, which enables the Guest OSs directly and safely accesses the device without the VMM software’s interference, is considered to be one of the best solutions to the overheads problem.This paper presents a design of hardware-assisted I/O virtualization for many-core platform, which is based on the PCIE interface layer for the practical project demands. To reach the requirements of frequent I/O access and high reliability in the virtualization systems based on the many-core processor, this design make special efforts on the DMA remapping, interrupt remapping and PIO which is for the core to configurate the devices’control and state registers. For DMA remapping, it add the I/O space mapping function to ensure isolation between different domains. It speed up the address translation procedure between guest virtual address and host physical address through optimizing the structure of I/O Translate Lookaside Buffer and prefetching technique. For interrupt remapping, this design integrate interrupt remapping table on the chip to accelerate the remapping procedure, in addition, it adopt an asynchronous event queue mechanism to handle the MSI interrupt,a dominant I/O interrupt type, which could accelerate the speed of handling this kind interrupts and reduce the performance impact on the cores. For PIO, this design uses a tactics which combines the tag assignment with score board mechanism, to improve the reliability and remap the PIO completion data.Since there are so many I/O accesses towards the shared device in the virtualization system based on many-core platform and they are not applicable to the design mentioned above, this paper addresses a solution named Hardware-assisted Self-Virtualization, which enables multiple guest OS directly access the device. Compared with existing Self-Virtualization Technology, my solution has such advantages as low hardware cost and flexible configuration.更多还原