【作者】 齐培红；

【导师】 谢应科； 刘金刚；

【作者基本信息】 首都师范大学 ， 计算机应用技术， 2009， 硕士

【摘要】 PCI(Peripheral Component Interconnect)总线是一种高性能,并被广泛使用的计算机局部总线,其接口电路已经成为各种计算机系统很重要的功能模块电路。但受制于PCI总线电气特性的约束,在一条PCI总线上,如果连接过多的PCI设备,系统性能会变得很低甚至不能正常工作。而在很多系统应用中需要对PCI总线进行扩展以增加系统中PCI总线的数量,从而能够支持更多的PCI设备以提升系统的系能,这就需要PCI-to-PCI桥。随着可编程逻辑器件的发展,在一片PLD芯片内实现复杂的逻辑控制成为现实。可编程逻辑器件(如FPGA)具有开发周期短,开发成本低,灵活性高,可重复编程等特点,在嵌入式系统设计中应用日趋广泛。使用可编程逻辑器件来实现PCI接口,其优点在于灵活的可编程性,可以依据需求进行功能最优化,实现紧凑的系统设计,从而大大降低了产品的成本。本文主要研究PCI-to-PCI透明桥IP核的设计与实现。根据项目需求,在综合比较开发PCI-to-PCI桥的几种方法的基础上,选择了使用FPGA来进行PCI-to-PCI桥设计,用Verilog语言对FPGA编程,采用模块化的设计方法进行设计,用状态机来控制PCI逻辑的时序。在桥的仿真验证中,对已有的仿真平台做了改进,并编写了测试向量,对PCI-to-PCI桥做了全面的仿真;为对PCI-to-PCI桥做片上测试工作,自行设计了PCI桥的测试板卡,并在PMON、Linux和vxWorks下分别对其进行测试,测试结果表明,PCI-to-PCI桥在功能和性能均满足项目需求。本论文的主要工作和取得的成果包括以下几个方面。1.提出了一种PCI-to-PCI透明桥的整体设计方案,设计实现了一个满足PCI-to-PCI桥规范的PCI-to-PCI桥IP核;2.采用多状态机协同处理的方式,并制定了内部状态机通信的协议,设计中还包含了异常情况下状态机的软着陆、缓冲区等设计技巧,这些设计技巧对其他大型接口电路的设计有直接的借鉴意义;3.设计了一个高效的仲裁器,次级总线支持8个PCI主设备。4.对现有的仿真平台加以研究并改进,实现了仿真的自动化,在EDA软件层次上保证了PCI-to-PCI桥功能的正确性;5.搭建PCI-to-PCI桥的验证平台,并在“基于龙芯SOC的嵌入式计算平台”上进行了功能和性能验证。更多还原

【Abstract】 PCI(Peripheral Component Interconnect) Local Bus which is used widely today is one of the high performance local buses in computer system.Its interface has become the very important circuit module in most computer systems.However,it is subject to the PCI bus electrical characteristics,if too many PCI devices connect to one PCI bus,the system will have a very low performance or even can not work properly.In many system applications,we need to expand the PCI bus system in order to increase the number of PCI buses and thus can be able to support more PCI devices and promote performance of the existing system,which requires PCI-to-PCI Bridge.With the development of programmable logic devices,it’s possible to achieve complex logic control in one PLD chip.Programmable logic devices,such as FPGA,have many excellent features such as short development cycle,low cost,flexibility,and re-programmability.Their application in embedded system design is becoming more and more popular today.The virtues of flexible programmability,function optimization based on demand,compact system design and substantial cost saving can be achieved by utilizing programmable devices when designing PCI interfaces.This thesis designs and implements a PCI-to-PCI transparent bridge IP core.Based on the needs of the project,we choose FPGA for PCI-to-PCI bridge design by comparing several methods of developing PCI-to-PCI bridge.Programing FPGA by Verilog language,dividing PCI-to-PCI bridge into sub-modules and introducing state machine to control PCI timing logic.Based on the current simulation platform,we improve it and prepare the test vectors for PCI-to-PCI bridge to do a comprehensive simulation;for PCI-to-PCI bridge IP core’s test on chip,design a PCI bridge board and test its function and performance in PMON,Linux and vx Works respectively.The results show that PCI-to-PCI bridge IP core has met the needs of projects both in functionality and performance.The main work and achievements are as follows.1.Give a PCI-to-PCI transparent bridge overall design scheme,and implement a PCI-to-PCI IP core compliant with PCI-to-PCI Bridge Architecture Specification and PCI Local Bus Specification.2.Introducing a method of multi-state machines’ cooperative work,and developing an internal communication protocol between state machines.The design also includes techniques of state machines’s soft landing under unusual condition,the buffer design,all these can be used in other large-scale design of the interface circuit directly.3.Design a effcient arbiter in PCI-to-PCI bridge which can support 8 master devices on secondary bus. 4.Improving the existing simulation platform to achieve automation simulation,ensuring correct function of PCI-to-PCI bridge in software level.5.Design a PCI-to-PCI bridge test platform,and verifying its function and performance in the "Embedded computing platform based on Godson SOC".更多还原