【作者】 李永安；

【导师】 贺洪江；

【作者基本信息】 河北工程大学 ， 计算机应用技术， 2009， 硕士

【摘要】 目前投入运行的汽车安全性能检测线基本上能够满足制动性能检测的要求,但现有的检测设备和检测手段也存在着不足,如汽车制动性能最重要的考核指标——制动力还存在着采样频率低、处理精度差等问题,同时整个控制系统也不尽完善。因此,设计更加合理、实用的汽车制动性能检测系统已成为一个崭新的课题,对检测手段和检测设备进行创新,意义深远。文中提出了基于可编程片上系统(SOPC)的汽车制动性能检测系统设计方案,为实现系统功能,选取的可编程逻辑器件(PLD)为现场可编程逻辑门阵列(FPGA)。设计了能模拟汽车道路行驶时制动全过程的制动性能检验台;以FPGA为核心重点设计了制动力采集、转速测量、与上位机的通讯和接口电路以及输出控制电路;基于FPGA的片内逻辑实现重点解决了A/D采集控制器、LCD显示控制器和基于通用异步收发器(UART)的串行通讯配置;为提高数据处理精度设计了基于FPGA硬件的软件滤波措施——复合滤波器并利用曲线拟合理论在上位机对数据作进一步处理。基于SOPC技术的汽车制动性能检测系统设计方案取得了如下的创新效果:(1).实现了片上系统,提高了系统集成度和可靠性。以单一FPGA完成整个系统的功能,大大简化了硬件电路设计,利用Nios II 32位软核处理器在FPGA内部对资源进行了配置实现片上编程,大幅提高了制动力的采样频率和精度,这是传统的设计方案无法做到的。(2).数字滤波采用全硬件来实现,提高了制动力数据的处理精度。利用FPGA内部丰富的逻辑资源加上功能强大的开发环境,在FPGA内部设计了全硬件的数字信号处理器——复合滤波器,有效提高了数据处理精度。更多还原

【Abstract】 At present, safety test line can basically meet the automobile brake performance test requirements, but there are shortcomings such as the most important indicators of automobile braking performance– braking force, there are still some poor problems in data acquisition and processing include of low sampling frequency and bad precision, and the whole detection control system is imperfect. So, the design of more rational and efficient automobile brake system performance testing has become a new topic. Means of detection and testing equipment to carry out innovative is far-reaching.In the paper, a kind of automotive braking performance test system has been designed based on a programmable system-on-chip (SOPC), for the realization of system functions, Field-Programmable Gate Array(FPGA)has been chosen as Programmable Logical Device . A kind of braking test Units that can simulate the whole braking process on-road; field-programmable logic device (FPGA) is selected as the core of system, mainly designed braking force sampling, speed measurement, communication and interface circuit with PC, some output control circuit is mentioned.The logic chip implementation based on FPGA has solved the problems of A/D controller, LCD display controller and serial communications configuration based on Universal Asynchronous Receiver Transmitter (UART). Composite filtering--software filtering measurement in dealing with the braking force based on FPGA hardware has designed, and the theory of curve fitting is used for further processing in PC.Design of braking performance test system based on SOPC has made such effects:Firstly, it has implemented SOPC and improved the system integration and reliability. Total control and signal processing can be achieved in single FPGA, Nios II as high-performance 32-bit soft-core microprocessor in FPGA internal configuration of resources, improved the sampling frequency and precision .It is the traditional design could not be achieved.Secondly, digital filter using all-hardware implementation, greatly improved the data accuracy. Using FPGA logic resources combined with powerful environments it has actualized interior design digital signal processor—composite filter.更多还原