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基于边界扫描技术的测试系统的研究与应用

Research and Application of Test System Based on Boundary Scan Technology

【作者】 潘小龙

【导师】 吴宁;

【作者基本信息】 南京航空航天大学 , 电路与系统, 2008, 硕士

【摘要】 边界扫描技术作为一种标准的数字电路测试及可测试性设计方法,它以特有的结构和检测方法克服了复杂数字电路板测试的技术障碍,能大大提高数字电路的可测试性。随着边界扫描芯片在电子设备中的大量应用,开发出实用的边界扫描测试系统,对于提高设备的可测试性、降低维护费用具有重要意义。论文的主要工作是在对边界扫描技术进行深入研究的基础上,设计并实现了基于边界扫描技术的通用测试系统,并将该系统应用到数字电路的故障诊断中。论文首先简述了边界扫描技术的IEEE1149.1标准及其在板级测试中的一些应用,并在此基础上给出了边界扫描测试系统的功能需求和设计方案。然后详细介绍了边界扫描测试卡的设计和边界扫描测试软件的开发。测试卡采用CY7C68013作为USB接口芯片,选择GPIF主控模式实现速度达20MB/s的数据传输接口;采用FPGA实现边界扫描控制器,为测试系统提供最高可达24MHz的可调测试时钟及两条扫描链路。测试软件在Visual C++ 6.0环境下使用面向对象和Access数据库技术开发,可以根据测试算法自动生成测试向量,并完成对数字系统的测试和故障诊断,界面友好,操作方便。最后,使用边界扫描测试系统对一块完成可测性设计的电路板进行了完备性测试、互连测试和簇测试。调试结果表明,边界扫描测试系统符合设计要求,具有测试速度快、即插即用、连接简单可靠等优点。在实际应用中,测试系统能够对电路板的呆滞、开路和短路故障进行有效的检测和诊断,达到了预期的效果。

【Abstract】 With the development of intergrated circuit, it is difficult to test the complicated circuit quickly and efficaciously based on traditional test method. As a standard technique of test and Design-For-Testability for the circuit boards, Boundary-Scan technique can improve the testability and controllability of complex digital circuits effectively by means of embedding special boundary scan cells inside the circuits. As widely application of boundary scan chips, it is very important to develop a Boundary-Scan test system in order to enhance the testability, reduce the maintenance costs of the electronic equipment.In this thesis, the Boundary Scan technique is discussed in detail and a general test system based on BST is also developed. Firstly, a primary conception on BST standard IEEE 1149.1 and some applications about BST in board test was introduced. As to be groundwork, the functional requairement and design scheme is provided. Then the thesis gives a detailed introduction to the design of boundary scan test card and the development of test software. The test card builds an interface with data rate of 20Mbytes/s using CY7C68013 as USB chip.The chip works in GPIF master mode. Its boundary scan test controller implemented by FPGA provides test clock reach 24MHz and two test channels. With the application of OOP and Access database under Visual C++ 6.0, the test software can auto-generate test vector by test algorithm. This software with friendly interface is convenient to be used. Finally, the control circuit board for fault wave recorder is designed based on DFT and tested by the system.After tested, the test system meets the design demand and has some advantages such as high test rate, plug and play, easy connection, and so on. In application, the test system can test stuck-at faults, open faults and short faults on board, and achieves the anticipated target.

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