【作者】 陶剑磊；

【导师】 王家楫；

【作者基本信息】 复旦大学 ， 材料物理与化学， 2008， 硕士

【摘要】 随着集成电路特征尺寸的不断减小,作为失效分析重要一环的失效定位技术也要做出相应的变革,传统失效定位手段在如此大的区域里去精确定位失效位置已变得不切实际。利用CMOS IC结构缺陷的红外发光现象可以快速地对失效位置进行定位,其灵敏度也很高。本课题的研究工作主要集中于研究CMOS IC结构中的红外发光现象。包括与缺陷有关的红外发光,如ESD保护电路击穿、闩锁效应、接触毛刺等。同时通过失效分析的典型案例研究,在电路和版图设计以及制造工艺上寻找和分析产生发光缺陷的根本原因和产生机理。在实验中,使用了光发射显微镜(PEM)对失效芯片进行缺陷定位,并研究了光发射显微镜的背面成像模式,以及影响观测结果的各种因素。更多还原

【Abstract】 With the continuous scaling down of the CMOS IC, failure isolation technology, as an important part of failure analysis technology, has to change to meet the challenge. It is impossible to precisely identify the failure location in the much larger IC area. However, the failure location can be quickly and precisely isolated by means of the micro-infrared radiation of defects in CMOS. This study aims to the micro-infrared radiation in CMOS, including the micro-infrared radiation of defects such as the breakdown of ESD protection circuit, latchup and contact spiking. Meanwhile, some case studies of failure analysis are conducted and the root cause and the mechanism of the micro-infrared radiation of defects are found from the aspect of circuit design, layout design and the process. In the experiment, Photon Emission Microscopy (PEM) is used to isolate the failure location. Back-side Observation Mode of PEM and the factor that will affect the results of Back-side Observation are also studied更多还原