【作者】 杨希；

【导师】 杨小雪；

【作者基本信息】 西南交通大学 ， 通信与信息系统， 2008， 硕士

【摘要】 随着信息时代的到来,数字电视系统必将取代模拟电视系统,因此单频网数字电视地面广播成为了当前的研究热点。而实现单频网的关键就是解决多个发射机发射同步的问题。本文所研究的DMB-T单频网适配器,就是实现DMB-T单频网同步的关键设备之一。该设备通过在原有的传输流中插入附带时间信息的兆帧初始化包,使得网内各中继发射站根据接收到的时间信息,推算出发射时间,从而实现各发射台发射同步。此外,它还能设置传输流的传输控制方式,并将这些控制信息写入到兆帧初始化包中传输出去。本文根据单频网适配器要实现的基本功能,提出了一种基于FPGA和单片机的DMB-T单频网适配器的整体设计方案,并将该系统分为控制板和处理板两部分进行处理。通过对各部分器件的选型和电路原理图的设计,实现了系统硬件平台的构建,并在硬件设计的基础上提出了一种DMB-T单频网适配器的软件设计方案。在实现过程中,该设计的难点在于如何实现ASI/SPI流之间的转换,控制板和处理板之间的通信,初始化兆帧包的构建与插入,码流同步,以及对输出码流的速率调整。本文就这些难点提出了一系列的解决方案,完成了功能划分和各子模块的设计,提高了代码的可重用性,降低了二次开发和升级的成本。文中还提出了一种新的PCR校正算法,这种算法通过TS流本身来传递PCR减法差值,避免了重复查找和定位PCR,既节省了FIFO所要占用的逻辑资源,又避免了在减法差值存储过程中对FIFO的读写控制,且时序控制相对简单,同时还简化了程序。经在线仿真验证,该设计达到了DMB-T单频网适配器的功能要求。完成整机后,对整机进行了实际的调试,通过使用专用的码流分析仪观察调试结果,并对结果进行分析,证明了该设计的可行性和可靠性,且达到了预期的技术指标。最后,本文对所做的研究进行了总结,提出了一些设计上有待改进的方案。更多还原

【Abstract】 With the advent of information age, the Analog TV system is destined to be replaced by the Digital TV system and hence Single Frequency Network (SFN) implementation of digital television terrestrial broadcasting becomes a hot topic of research. The key of SFN implementation resides in resolving the transmission synchronization problem of different broadcasters. This paper presents studies of a SFN Adapter based on the DMB-T standard, which is a key equipment to achieve the synchronization in DMB-T Single Frequency Network.A major function of the equipment is to insert Mega-frame Initialization Packet (MIP) into the transport stream so that each relay station can calculate the synchronized broadcasting schedule according to the time information included in the MIP. Moreover, it can set the traffic control parameters and broadcasts these control information with the MIP.An integral design of DMB-T SFN Adapter based on a FPGA and a single-chip is presented in this thesis. The whole system is divided to two parts according to their functions: the control panel and the processing board. A practical hardware platform design is accomplished through careful selection of various components and circuit schematic diagram design of each part. Based on the hardware design, a DMB-T SFN adapter software implementation is then presented.In the actual development process, problems focus on how to achieve conversion of ASI / SPI flow, how to handle communications between control panel and processing board, and how to realize construction and insertion of MIP, synchronization of stream, as well as adjustment of code flow rate. In this thesis, a series of solutions are proposed for these difficulties and the whole design is accomplished via functional modules, which improves the reusable merit of code and reduces the secondary development and upgrading costs. The paper also proposes a new PCR correction algorithm, which delivers the PCR difference through transport stream to avoid repeating search and positioning of PCR. The proposed method not only saves FIFO logic resources, but also avoids repeating read and write control of FIFO in storage of subtraction values. Moreover, the schedule control is relatively simple and the program is simplified. Online simulation results show that the design achieves the functional requirements of DMB-T SFN adapter. With the completion of practical equipment, this paper also presents the debugging results obtained from a special stream analyzer. Analyses of the observation results prove the feasibility and reliability of the design and demonstrate the achievement of expected technical indicators. Finally, this paper summarizes the contribution of the research and gives an outlook on future improvements on this design.更多还原