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宽带干扰信号产生电路设计与实现

【作者】 段靖辉

【导师】 王建新;

【作者基本信息】 南京理工大学 , 信号与信息处理, 2008, 硕士

【摘要】 干扰是电子对抗中的一个重要分支。本设计中用于干扰的宽带线性调频信号是通过MATLAB软件产生的,然后将其分为四个相关文件分别保存在了四张SD卡上。系统工作时,利用FPGA来读取存储在SD卡上的干扰信号,通过FPGA内部的位扩展及FIFO的数据缓冲,使得发送出去的数据满足设计要求,达到对目标信号的干扰作用。本论文对SD卡的工作原理、FPGA内部软件设计实现、硬件电路设计、整体电路调试进行了研究,并给出了部分设计模块的测试结果。本论文首先介绍了系统设计思想,FPGA的基本结构和设计流程,说明了外围芯片的特点和作用,JTAG接口等,接着介绍了SD卡的相关知识,包括卡的初始化过程,工作状态的转换,命令集及操作流程,并且对SD卡工作时序进行了分析研究,然后详细介绍了FPGA内部的编程思想,相关功能模块的设计实现及测试结果(所有模块的实现都是采用Verilog HDL编程),最后介绍了板极调试所用到的几个工具:数字示波器,逻辑分析仪和QuartusⅡ自带的工具SignalTapⅡ,并给出了部分测试过程和结果。

【Abstract】 Jamming is an important branch in the Electronic Countermeasure (ECM). In the thesis, the jamming signal generated by MATLAB software is divided into four relevant documents which are preserved in four SD cards. The data stored in the SD cards will be read by FPGA. Through the bit-extension in FPGA and FIFO data buffer, the format of data will meet the design requirements. The working principle of SD card and the design procedure of FPGA are studied in the paper.This thesis firstly introduces the thought of system design, the basic structure and design procedure of FPGA, the power supply design, and the characteristics and functions of some chips and the JTAG interface, etc. Then this thesis introduces the knowledge of SD card, including card initialization, the conversion of the status, SD card commands and operational process, then the SD card timing is analyzed. Thirdly this thesis provides the realization of the FPGA programming ideas, the design and test of the related functional modules (all modules are programmed in Verilog HDL). Finally this thesis introduces several tools which are used in debugging: Digital oscillograph, and SignalTap II attached of Quartus II, and provides some test process and results.

【关键词】 SD卡模块设计Verilog HDLFPGA
【Key words】 SD cardThe module designVerilog HDLFPGA
  • 【分类号】TN972
  • 【下载频次】206
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