基于CMOS工艺的低噪声放大器与混频器设计

【作者】 杨吟国；

【导师】 吴明赞；

【作者基本信息】 南京理工大学 ， 电路与系统， 2008， 硕士

【摘要】 这篇论文以射频接收机前端关键器件中的低噪声放大器与混频器为研究对象,在系统分析无线局域网中射频接收机几种典型结构及其性能指标的基础上,根据IEEE802.11a标准,应用Agilent公司的ADS2003C电路仿真软件进行电路设计。首先,在分析、比较低噪声放大器的结构、工作原理与性能指标的基础上,综合多种因素,选用电感源极负反馈以及共源共栅低噪声放大器的电路结构。应用Matlab编程计算出栅宽与噪声系数的关系曲线,供电路设计时参考。应用ADS软件对此电路进行设计、优化与仿真,仿真结果:输入回波反射系数S₁₁和输出回波反射系数S₂₂均小于-30dB;增益S₂₁为13.9dB;反向增益S₁₂为-29dB;在5.2GHz处,噪声系数为1.3dB;1dB压缩点为-11dBm,输入三阶互调点大约为-2dBm。上述结果表明设计的低噪声放大器能够实现很好的输入输出匹配,较高的正向传输增益,反向隔离和线性度均满足设计要求。其次,在分析、比较几种典型混频器的基本原理和性能指标的基础上,选择Gilbert单元结构混频器设计电路,并进行噪声分析,引入改进的电流注入结构。应用ADS软件对此电路进行设计、优化与仿真,仿真结果:变频增益为16.5dB;噪声系数为15.2dB;1dB压缩点为-15dBm;三阶交调截点为-5dBm;静态工作电流为40mA,功耗为72mW。上述结果表明:设计的混频器各项性能指标均达到设计要求。最后,将设计仿真完毕的带电感源极负反馈的共源共栅低噪声放大器和Gilbert单元结构混频器电路,采用TSMC 0.18μm CMOS工艺元件库,应用Cadence软件画出这两种电路的版图。上述工作对射频集成电路设计有一定的参考价值。更多还原

【Abstract】 In this paper, the key devices—low noise amplifier and mixer in the front-end of RF receiver have been studied, on the basis of the systematic analysis several typical structures of WLAN RF receiver and performance indicators. According to IEEE802.11a standards, ADS2003C of Agilent’s circuit simulation software is used for the circuit design.Firstly, on the basis of the analysis and comparison of low noise amplifier’s structure, work principle and performance targets, integrating a number of factors the structure of inductor source negative feedback and cascade has been chosen. The curves of gate width and noise factor are obtained by using the Matlab, which are references for the design. By using the simulation tool ADS, the low noise amplifier has been designed, optimized and simulation. The simulation results are: the enter echo reflection coefficient S₁₁ and output echo reflection coefficient S₂₂ are less than -30dB; the gain S21 is 13.9dB; the reverse gain S₁₂ is -29dB; at 5.2GHz, the noise factor is 1.3dB; P_1dB is -11dBm, IIP₃ is about -2dBm. These results show that the designed low noise amplifier has achieved good input and output match and the higher positive transmission gain, the reverse isolation and linearity all have met the design requirements.Secondly, on the basis of the analysis and comparison of several typical mixer structures, fundamental and performance targets, the Gilbert unit mixer has been selected for the circuit design, then the noise analysis and the improved current injection structure has been given. By using the simulation tool ADS, the circuit has been designed, optimized and simulated. The simulation results are: frequency gain isl6.5dB; noise factor is 15.2dB; P_1dB is about -15dBm; IIP₃ is about -5dBm; quiescent operating current is 40mA, the power consumption is 72mW. These results show that: the performance indicators of the design of mixer have met the design requirements.Finally, after the simulation, the layouts of the inductors source negative feedback and cascade low noise amplifier and the Gilbert unit mixer have been designed, using TSMC 0.18μm CMOS technology library and the Cadence software. This paper has certain value for the RFIC design.更多还原