【作者】 宋毅；

【导师】 何怡刚；

【作者基本信息】 湖南大学 ， 电气工程， 2008， 硕士

【摘要】 随着集成电路设计和制造技术的不断进步,芯片的集成度和复杂度正按照摩尔定律的速度持续提高。尤其是超深亚微米(VDSM)工艺的使用,生产过程中出现的故障也越来越多样、难测。芯片测试遇到了前所未有的挑战,已成为制约整个行业发展的瓶颈。在这种情况下,从故障类型、测试设备及测试成本考虑,可测性设计(DFT)技术成为解决芯片测试问题的主要手段之一,日益引起人们的重视。论文主要针对嵌入式系统随机存储器的测试,研究解决办法。首先,介绍了数字集成电路和存储器及测试技术发展现状、趋势。论述了存储器的基本结构、分类、故障模式和故障模型。然后,研究分析了存储器测试的方法,产生测试图形的各种测试生成算法,按图形的测试长度与存储单元大小关系分类举例介绍。这些测试算法,复杂程度不同,故障覆盖率也不同。详细分析了March算法,并将其扩展成能面向字存储器测试的算法。内建自测试(Built-In-Self-Test,BIST)技术被认为是解决由于电路集成度越来越大所造成的测试费用巨大和测试访问困难等问题的最有希望的技术。本文针对存储器测试采用MBIST。MBIST是目前大规模存储器测试最通用的方法,该方法将BIST逻辑电路嵌入芯片内部,实现片上BIST结构,本文实现了BIST电路的控制器、地址产生器、向量生成器、响应分析器等电路,最终实现片上自动测试存储器。本文采用VHDL程序仿真BIST结构,并仿真一个随机存储器,将各种故障加入其中,采用March C算法,结果表明该方法能覆盖多数故障,从而验证基于March算法BIST结构测试的有效性。更多还原

【Abstract】 With the increasing of the IC design and manufacturing technology, the integration and complexity of chips keeps increasing in accordance with Moore’s LAW. Especially the VDSM technology is usedm, the faults become more and more types and difficulty to test on the production process. Chip testing issue meets unprecedented challenges, has become a bottleneck restricting the development of the whole industry. In such circumstances, considering from the fault types, test equipments and testing costs, the DFT technology becomes a principal means to solve the chips testing problem, is paid attention gradually by people.The thesis is about the embedded RAM testing, researches solution. First, the thesis introduces the digital IC, memory and testing technology development status and trends, describes the memory basic structure, categories, failure model and fault models. Then, the thesis researches and analysis memory testing methods, the algorithms which generate the test pattern graphics. The algorithms are described according to the relations between test pattern graphics’length and memory size. These algorithms, the complexity and fault coverage are both different. It analysis the March algorithm in details, and this algorithm has been developed into a kind of word-oriented algorithm.The IC integration is more and more big; it causes the big testing expense and testing access difficult. BIST (Built-In-Self-Test) is considered for a technology which can solve these problems. The thesis uses MBIST for RAM testing. MBIST is widely used in the mass memory testing. The BIST logic circuit is embedded in the chip, on chip BIST structure. The BIST controller, address counter circuit, the data generator circuit and the response compare circuit have been implemented respectively, the test is automatically run on the chip. The BIST structure and a RAM which is added in many kinds of faults have been simulated with VHDL, use March C algorithm. The result shows the method can cover most faults, it testifies the validity of the MBIST testing based on March algorithm.更多还原