基于ARM7核的SoC芯片软硬件协同验证

【作者】 强亚东；

【导师】 田泽；

【作者基本信息】 西北大学 ， 信号与信息处理， 2008， 硕士

【摘要】 验证是SoC(系统芯片)设计过程中不可或缺的重要环节,它是在流片前发现设计缺陷和错误的最后机会,所以对于整个项目的成败而言,验证的作用至关重要。随着应用需求的不断提升,SoC的设计规模急剧增大,功能日益复杂,性能要求也越来越高,如何缩短验证时间、提高验证效率和质量以缩短芯片的上市时间便成为当今SoC设计领域中最为关注的课题之一。本论文的研究工作是基于ARM7核的某SoC芯片开发项目的一部分。本文在分析讨论SoC软硬件协同设计和验证技术的基础上,以基于虚拟原型仿真和基于FPGA原型验证相结合的方法构建软硬件协同仿真验证平台,根据既定的功能验证流程和规范,先分别开发模块级和系统级验证程序,在两种验证环境下对SoC设计进行层次化的功能验证;在此基础上,提出了基于嵌入式操作系统的SoC软硬件协同验证的方法,在片上移植两个典型的嵌入式操作系统μCOS-Ⅱ和μCLinux,并开发基本的应用程序以对片上资源进行管理和调用,一定程度上提高了验证效率和质量。本论文所提出的方案在此SoC芯片的开发过程中得以实施,并取得了良好效果。更多还原

【Abstract】 Verification is the indispensable link in the whole process of SoC(System-on-Chip) designing, it is the last chance found the existing shortcomings and mistakes in the design before the design production discovered.So speaking of the entire project’s success or failure, the verification is very important. With the application requirements constantly promoting and SoC design size growing, the function is getting more and more complex, and performance requirements are also higher. So how to shorten verification time and improve efficiency and quality of test chips to shorten time to market has become one of the greatest concern issues in today’s SoC designing field.This paper’s work is part of a SoC chip hardware and software co-designing and verification project, which based on ARM7 processor core.In the foundation of discussing the SoC hardware and software co-design and verification technology, we use the method combining the hypothesized prototype with FPGA prototype to build the SoC co-simulation and co-verification Platform first, then develop module level and system level verification procedure according to function verification flow and rule and verify the SoC in the two environment. On this basis, we propose a new method of SoC software and hardware co-verification based on the embedded operating system, transplantμCOS -II andμCLinux on SoC platform and develop the basic application procedure to manage and call the resources on SoC.With adopting this method, the efficiency and the quality of SoC verification having been improved to a certain extent. The plan mentioned in this paper has been implemented in the SoC chip development process, and has achieved good results.更多还原