【作者】 杨媛媛；

【导师】 李晓光；

【作者基本信息】 北京交通大学 ， 微电子学与固体电子学， 2008， 硕士

【摘要】 模数转换器是模拟与数字世界的接口,目前有多种类型的模数转换器,对于传统A/D转换器,如逐次逼近型、全并行型和流水线型等类型,由于高精度模拟电子器件受到集成度、温度等变化因素的影响,而且为了防止混叠噪声,需要高性能的前置滤波器,这使得传统的A/D转换器的精度很难提高,从而限制了转换器的分辨率。为了避免这些问题,过采样技术被运用到A/D转换器的设计中。Sigma-deltaADC具有分辨率高,抗干扰能力强,量化噪声小,线性度好的优点。在减少了对模拟电路部分精度要求的同时可以达到和数字电路完美的兼容,可以以较低的成本实现高精度的A/D转换器。所以使得其广泛应用于高分辨率的音频等数模混合电路中。目前sigma-delta ADC主要应用于音频应用和数据采集方面等。本文对Sigma-delta调制器的工作原理进行了研究和分析,在此基础上设计了一种应用在音频方面的16位两阶Sigma-delta调制器。论文先应用MATLAB软件中的SIMULINK工具对∑-△调制器的各种结构进行分析比较,最终确定采用量化器为一位的单环二阶调制器。调制器采用全差分电容电路实现,调制器的输入为10KHz,过采样率为256,动态范围为98dB。在调制器系统级设计及仿真的基础上,论文接着对调制器中的各种电路模块(如开关电容积分器、共源共栅套筒二级运放、动态比较器、时钟电路等)进行了RTL级设计。经过仿真测试得到,使用米勒补偿的套筒二级运放增益高达94dB,单位增益带宽84M,相位裕度73°;CMOS传输门导通电阻为3K,且导通电阻近似和输入无关,实现了线性性;动态比较器迟滞小于40mV;这些参数可以满足调制器要求。论文最后对套筒二级运算放大器进行了版图实现。电路仿真设计和版图实现阶段采用的是CADENCE公司的EDA工具,设计采用SMIC 0.18um1P4M(一层多晶硅四层金属)CMOS工艺的设计规则,整个OTA版图面积为0.91*0.79mm~2。更多还原

【Abstract】 ADC connects analog with the digital world. There are various types of ADCs at present. The traditional ADC, such as successive approximation, flash-type and pipeline and so on, need high-performance pre-filter to prevent aliasing noise. Also high-precision electronic components of the converter could be easily influenced by integration and temperature factors. As a result of this above, it is difficult to improve traditional ADCs’ accuracy. In other words, it will hold back the realization of high-resolution converters.To avoid these problems, the sampling technology has been used in ADCs design. Sigma-delta ADC has several advantages, including high resolution, anti-jamming capability, small quantization noise and good linearity. The analog circuit of Sigma-delta ADC can achieve perfect compatibility with digital circuit without the accuracy requirements. So Sigma-delta ADCs are widely used in high-resolution audio and Mixed-circuits which will be able to lower the cost of high-precision ADCs. Now sigma-delta ADC is used primarily for audio applications and data acquisition aspects.The paper had made a deeply analysis about the basic principle of sigma-delta modulator. Based on this analysis, a two order Sigma-delta modulator which has 16 bits resolution has been turned out. At first the different structures of the sigma-delta modulators are compared based on MATLAB soft and SIMULINK toolbox. From the analyse of above, a two-order modulator with 1-bit quantizer has been chosen. The modulator is implemented with fully differential switched-capacitor circuits, 10 KHz input, a sampling rate of 256, up to 98dB dynamic range. On the basis of the a behavioral level simulation of the whole system, the discussion will begin by exploring the RTL level design of various circuit block in the modulator, i.e, switched-capacitor integrator, telescopic cascode two-stage operational amplifier, clock-control comparator, clock generation circuit,etc. Simulation results show that OTA achieves a 94dB open-loop gain, a 84M bandth and a 73°phase margin. The turn-on resistance of the switch is 3K and is almost independent of the input. The delay of the comparator is less than 40mV. The parameters satisfy the requirements of the modulator. In the end, the layout design of the telescopic cascade operational amplifier is shown.The circuit simulation and layout design are based on SMIC0.18um1P4M CMOS process by Cadence EDA tools. The area of the telescopic cascode two-stage operational amplifier with common feedback is 0.91 *0.79mm~2 .更多还原