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VAR综合多业务光传输交换系统的设计

Design of VAR Multi-services Optical Transmission and Switching Integrated System

【作者】 邵海锋

【导师】 石旭刚;

【作者基本信息】 浙江工业大学 , 通信与信息系统, 2007, 硕士

【副题名】系统时钟同步的设计

【摘要】 VAR综合多业务光传输交换系统是为了满足目前市场上日益庞大且指标日益高涨多级联网监控的要求而提出,它将取代传统监控系统的众多设备,使系统简洁实用,并能满足未来监控网络扩大的需求。本文在研究VAR系统产生背景、原理和相关技术的基础上,重点进行系统时钟同步设计。设计时根据同步策略的不同分为VAR传输交换网络的时钟同步和VAR系统中心与前端、终端接收系统的时钟同步这两个方面来考虑。VAR传输交换网络采用同步网技术进行同步;VAR系统中心与前端、终端接收系统采用了基于缓存的自适应时钟同步方案进行同步。在设计VAR系统中心与前端、终端接收系统同步方案的时候,首先对两者间的连接网络进行时延测量,证明其时延变化很小。因此在端设备处适合用基于缓存的自适应同步方式。然后在详细分析文献[18]的同步方案基础上,提出了一种基于最小二乘线性回归的时钟同步方案,并经过仿真分析证明其能有效地滤除时延抖动对缓存变化的影响,使接收端能够准确地跟踪源端时钟频率。本文还尝试把加权平均算法引入到缓存采样数据去抖中,分析其性能。并在FPGA电路板上对基于缓存的自适应时钟同步算法进行具体实现。还提出一种分组丢包检测处理机制。

【Abstract】 VAR multi-services optical transmission and switching integrated system can satisfy the requirement of future monitoring system. It can replace many equipments in traditional monitoring system, and it is very simple and useful.The backgrounds, principle and some important technologies are described in the thesis. The clock synchronization of VAR is studied as emphases, and it is divided into two parts for designing. SDH technologies are used in VAR transmission and switching integrated network, and adaptive synchronous algorithm is used between VAR center and terminal.During the study of synchronization between VAR center and terminal, delay variety of packets network which between VAR center and terminal is measured, and the result shows that the delay variety of packets network is very small. So the adaptive synchronous algorithm for clock recovery can be used at terminal. Then the thesis analyzes the adaptive synchronous algorithm[18] in detail. And introduces Least Square Linear Regression based clock recovery algorithm at terminal. The algorithm has the ability to filter out buffer level flucation efficiently and remove the negative contribution of delay jitter in clock recovery. The new algorithm enables the terminal clock to be synchronized with the VAR center more accuracy. The thesis also try to adopt weighted average algorithm to smooth the packet jitter, and analyses performance of the algorithm. The algorithm is implemented on FPGA circuit board. At last, a new scheme about detection and processing of packet lost is gived in thesis.

  • 【分类号】TN929.1
  • 【下载频次】14
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