【作者】 彭平良；

【导师】 李木国；

【作者基本信息】 大连理工大学 ， 信号与信息处理， 2008， 硕士

【摘要】 图像采集和处理技术在机器视觉和图像分析等诸多领域应用十分广泛，大部分情况下，采集卡只需将前端相机捕获的图像信息正确地传回计算机即可。但是在要求较高的应用场合需要采集卡能准确控制外部光源和相机，完成图像采集，预处理，数据传输。只有这样，用户才可以根据不同的兴趣和需求对特定的某些图像进行采集、传输以及处理，以达到某种分析目的。本文根据国家985二期项目“三维粒子图像测速系统”的图像采集与处理需要，设计开发了一款以FPGA为核心控制芯片的嵌入式图像采集卡。采集卡以FPGA为逻辑和算法实现的核心器件，不仅实现了传统意义上的图像采集，而且实现了CCD相机控制和激光器同步曝光功能，打破了以往单纯靠增加硬件设备实现同步控制的方法，简化了系统硬件结构并节约系统成本。此外，在系统中嵌入了图像增强算法和采用PCI接口与计算机连接满足了高速采集的要求。同时，采用市场上广泛应用的Camera Link作为采集卡的图像输入接口，提高了系统的通用性、传输速率和抗干扰能力，简化图像获取设备和模拟摄像头之间需要视频解码等连接。具有嵌入式处理功能，光源同步和相机控制的采集卡将使机器视觉系统，图像测速等诸多领域的图像采集应用变得更为便捷。论文首先对图像采集卡系统的组成、整体方案和可行性进行了论证。然后给出了图像采集卡的硬件设计。在此部分结合整体设计方案，讨论芯片的选型问题。根据所选芯片的本身特点，分模块地对图像采集卡的硬件设计原理进行了详细的阐述。接下来是图像采集卡的软件设计部分。用VHDL和原理图结合的方法对FPGA进行编程，实现了图像采集系统的各个功能模块。根据图像采集系统的要求用DriverWorks软件设计了图像采集卡的WDM底层驱动程序和上层应用程序。最后是用FPGA实现了带修改参数的硬件嵌入式图像处理算法——图像增强。论文中使用QUARTUS软件嵌入的逻辑分析仪SignalTap对FPGA设计的模块进行了硬件调试，给出了调试的时序图和调试结果，经测试分析该采集卡满足“三维粒子图像测速系统”的要求，达到了预期目标。更多还原

【Abstract】 The application of image acquisition and processing technology in many fields such as machine vision and image analysis is very wide. In most circumstances, frame grabber is only responsible for transmitting the image data captured by the front-end cameras to the computer. In other special circumstances, frame grabber must accurately control cameras and synchronize external light source, in order to implement image capturing, pre-processing and image data transmitting. In this way, users can, depending on the various needs, deal with and analyze the sent-back data, so as to achieve certain purposes.According to the image processing needs of the three-dimensional particle image velocimetry system, whichi is a 2^nd project of 985 SCHEME, an embedded image frame grabber, the heart of which is FPGA, is designed and developed. The logic and algorithms are realized by programming the FPGA chip, in order to achieve both the image acquisition in traditional sense and the control of CCD camera and LASER synchronization exposure function. This breaks the traditional synchronized control methods which is simply relied on increased hardware devices, correspondingly simplify the structure of the hardware system and save the total cost. In addition, the image enhancement algorithm is embedded in the system ,the requirements of high-speed acquisition is met using PCI interface, the widely used Camera-Link is adopted as the image input interface, all these methods enhances the versatility, the transmission rate and anti-jamming capabilities of the system, also simplify the connectivity between the image acquisition equipment and the analog camera. The frame grabber, which is capable of embedded processing, camera control and light source synchronization, will make the image acquisition in many areas such as machine vision systems, image velocimetry become more convenient.First the paper not only proves the makeup and the scheme of the image acquisition system but also the feasibility of the system. Then the hardware design is given. The problem of selecting chip is referred when masterminding the architecture of the system. According to the characteristic of the chip, the card’s hardware design theory is expatiated in models. The following is the part of the software of the image acquisition card. The every model of the image acquisition system is implemented by programming the FPGA in VHDL and schematic. Based on the requirements of the image acquisition system, the WDM driver is designed by DriverWorks and application program is also given. The IP core is implemented in FPGA at last. And the function of the IP care is hardware embedded graphic arithmetic--image enhance, in which the parameter can be changed. By using the QUARTUS’ logic analyzer （SignalTap）, the modules for FPGA design is debugged in hardware, and the timing map and the debug results is given.After tested and analyzed, the acquisition card meet the requirements of "three-dimensional particle image velocimetry system" and the planned targets is achieved.更多还原