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空间图像CCSDS压缩算法研究与FPGA实现

CCSDS Space Image Compression Algorithm and FPGA Implementation

【作者】 雷震霖

【导师】 殷福亮; 陈喆;

【作者基本信息】 大连理工大学 , 通信与信息系统, 2007, 硕士

【摘要】 随着空间技术的发展,遥感图像获得了日益广泛的应用,随之带来的遥感数据海量增长,给存储和传输都带来极大的困难,因而进行有效的数据压缩就显得特别迫切和重要。图像压缩编码技术能降低图像冗余度,从而减小图像的存储容量和传输带宽,它的研究对于遥感图像的应用具有重要的现实意义。CCSDS图像压缩算法是空间数据系统咨询委员会(CCSDS)提出的图像数据压缩算法。该算法复杂度较低,并行性好,适合于硬件实现,能实现对空间数据的实时处理,从而广泛应用于深空探测和近地观测。本文针对CCSDS压缩算法进行了研究,本文主要工作如下:(1)对CCSDS编码系统的基本理论进行了深入研究,并对其编码性能进行了系统分析。总结了各种常用压缩技术的特点和算法,然后以此为参照,对CCSDS在遥感图像压缩中的优势进行了讨论。此外,从应用出发,多角度比较、分析了其编码的有效性。这部分的研究为实际应用奠定了必要的理论基础。(2)介绍了Xilinx公司Vertex-Ⅱ架构的FPGA硬件平台,以及所应用的Verilog HDL开发语言。描述了FPGA开发的流程,并结合流程介绍了集成开发环境ISE和仿真软件ModelSim。(3)在给出总体发计方案后,按算法的功能模块给出了CCSDS编码器的FPGA实现方法和实现性能,详细介绍了位平面编码的实现和优化重点。(4)将源代码下载到硬件上并用不同图像测试,在不同压缩等级设置下均通过测试。测试的验证结果表明:基于FPGA的CCSDS图像压缩算法占用资源较少,并在较高的频率下运行,设计方案在速度和资源利用率方面达到了较好的平衡,达到了预期的设计目的。

【Abstract】 With the development of remote sensing (RS) technique in recent years, the RS images have growing applications in many different fields. Therefore, it’s necessary to compress them efficiently because of the rapid increasing of RS data. Because the RS images have the characteristics of large amount of information, low space redundancy and special applications, some conventional compression methods sometimes could not get better results. Therefore, the Consultative Committee for Space Data System put forward the CCSDS image compression algorithm, which is a special for RS application. The algorithm has lower complexities and good parallel architecture, and it has been widely used in deep-space probes and near-earth observatories. Therefore, this dissertation researches in several aspects as follows.Firstly, the fundamentals of CCSDS are thoroughly researched, and the coding characteristics are systematically analysed. After the characteristics of the comman image compression methods are summarized, the advantages of CCSDS are analyzed. Furthermore, from application point of view, the coding efficiency is compared and analysed variously. These studied provide necessary theory basis for the application.Secondly, the Xilinx FPGA of Virtex-II architecture and Verilog Hardware Description Language are introduced. Then the flow of FPGA design is described, and the intergrated developing environment ISE and simulation software ModelSim are described step by step.Then, after the total design is given, the FPGA implementation methods and performance of CCSDS encoder are presented. The Bit Plane Encode module is described in particular and also the key of optimization.Finally, the source code is downloaded into FPGA. Then the programme is tested by several test-image in different grades of compression, which is tested successfully. The results show that: CCSDS image compression algorithm base on FPGA cost less hardware resources, and can operate under higher frequency. The design achieved a well utilization of resources and speed of state and the expectant design aim is fulfilled.

  • 【分类号】TP391.41
  • 【被引频次】11
  • 【下载频次】348
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