【作者】 罗正岳；

【导师】 朱冰莲；

【作者基本信息】 重庆大学 ， 信号与信息处理， 2007， 硕士

【摘要】 扩频通信系统与常规的通信系统相比,具有很强的抗窄带干扰,抗多径干扰,抗人为干扰的能力,并具有信息隐蔽、多址保密通信等优点。在近年来得到了迅速的发展。本论文主要讨论和实现了基于FPGA的直接序列扩频信号的解扩解调处理。论文对该直扩通信系统和FPGA设计方法进行了相关研究,最后用Altera公司的最新的FPGA开发平台Quarus II5.0实现了相关设计。整个系统分为两个部分,发送部分和接收部分。发送部分主要有串并转换、差分卷积编码、PN码扩频、QPSK调制、成型滤波等模块。接收部分主要有前端抗干扰、数字下变频、解扩解调等模块。论文首先介绍了扩频通信系统的特点以及相关技术的国内外发展现状,并介绍了本论文的研究思路和内容。然后,论文分析了几种常用的窄带干扰抑制、载波同步及PN码同步算法,结合实际需要,设计了一种零中频DSSS解调解扩方案。给出了抗窄带干扰、PN码捕获及跟踪以及载波同步的算法分析,采用了基于数字外差调制的自适应陷波器来进行前端窄带干扰抑制处理,用基于自适应门限技术的滑动相关捕获和分时复用单相关器跟踪来改善PN码同步的性能,用基于硬判决的COSTAS(科斯塔斯)环来减少载波提取的算法复杂度,用改进型CORDIC算法实现NCO来方便的进行扩展。接着,论文给出了系统总体设计和发送及接受子系统的各个功能模块的实现分析以及在Quartus II5.0上的实现细节,给出了仿真结果。然后论文介绍了整个系统的硬件电路设计和它在真实系统中连机调试所得到的测试结果,结果表明该系统具有性能稳定,灵活性好,生产调试容易,体积小,便于升级等特点并且达到课题各项指标的要求。最后是对论文工作的一些总结和对今后工作的展望。更多还原

【Abstract】 The spreading spectrum(SS) communication system has stronger ability of resisting narrow band, multipath and jamming interference than that of the conservation communication systems,and it also has the characteristics of low probability of intercept and multiple access secure communication. Nowadays, the SS technology has gotten rapid progress. This thesis primarily discusses the baseband processing of DSSS communication signal based field programmable gate array (FPGA) ASIC chip. The design technique of FPGA related to SS communication system also has been discussed in this thesis. Finally, the related subsystem has been designed and implemented based on the FPGA development platform Quartus II5.0 belonging to the Altera Company.The total system can be divided into two parts, i.e., transmitter and receiver unit. The transmitter unit mainly consists of the serial-to-parallel conversion, differential encoder, PN code generator and QPSK modulator and so on. The receiver unit mainly consists of the digital down converter, spread spectrum demodulator, differential demodulator and so on.Firstly, the thesis introduces the characteristics of the SS communication system and the development related to SS technology at present in the world. The outline and the research idea of the thesis also have been introduced.Secondly, some algorithms of narrowband interference resisting, PN code and carrier synchronization are presented in this paper. Through practical demand, an algorithm of a digital receiver of DSSS with zero-intermediate frequency is put forward. Narrowband interference resisting algorithm, PN code acquisition and tracking algorithm, carrier demodulation algorithm are described. It resists the narrowband interference by using the digital adaptive heterodyne filter at the forint end. It improves function of PN code synchronization by double threshold series acquisition and time division multiple single correlator tracking. It reduces the complexity of carrier withdrawing algorithm by using soft costas PLL based on sign function. The structure can be easily expanded by using the improved CORDIC algorithm in the implementation of the NCO.And then, the analysis and the implement detail for all modules based on Quarus II5.0, both transmitter and receiver unit, have been given in this section. The results of behavior simulation of all modules also have been represented. The hardware design of the whole system and the test results in the system are presented in the paper. It is seen that the system has stable performance, high activity, small size, and can be easily produced and flexibly updated. It is also fit the demand of the system.The summaries of the thesis and the possible extensions and improvements based on the completed system have been represented at last.更多还原