【作者】 王二萍；

【导师】 张伟风；

【作者基本信息】 河南大学 ， 微电子学与固体电子学， 2007， 硕士

【摘要】 相对于并行总线,串行总线具有结构简单的优点。近年来人们对系统功能和性能的需求不断增长使得处理器需要的外设越来越多,这时串行总线相比于并行总线结构简单这一优点就逐渐显现出来了,因此应用范围也越来越广泛。SPI (Serial Peripheral Interface)串行外设接口总线是一种3线同步全双工串行通信接口总线,在很多新型器件如LCD模块、FLASH、EEPROM存储器、数据输入、输出设备上都采用了SPI接口。但是在很多场合,微控制器或微处理器本身又不具有SPI接口,给数据传输带来不便。在FPGA技术发展迅速的时代,解决这个问题最方便的办法就是集成一个SPI核到芯片上。本文的工作就是根据业界通用的SPI总线的标准,设计一种可复用的高速SPI总线。设计过程中很多变量都采用参数形式,具体应用于工程实践时根据实际需要更改参数即可,充分体现了可复用性。由于SPI本身没有应答机制,对传输时序要求比较严格,所以就需要一个稳定可靠的同步时钟。针对这种需要,本文工作中特别设计了一个对奇偶分频分别考虑的时钟生成模块提供可靠的同步串行时钟。执行串并转换功能的数据传输模块结构简单,消耗硬件资源少,但却有很强的功能,如:每次最高传输多少位数据可选,最高值为128;传输速度快,属于遵守SPI协议的同类器件里速度较快的。设计思想用Verilog HDL语言实现,借助QuartusП做电路修正,在ModelSim仿真软件上仿真验证通过,达到高速可复用的要求。更多还原

【Abstract】 Compared with parallel buses, the advantage of serial buses is that their structure of circuit is more simple. Recently, increasing with the requirement of the functions and performances of devices, the demand for multiple peripherals microprocessor is enhanced. Thus, serial buses have an extensive application in this aspect.SPI (Serial Peripheral Interface) is a 3 line synchronous full-duplex serial communication interface bus. Many devices such as LCD, FLASH, EEPROM, Input/Output devices, adopt SPI. However, in many other aspects, microcontroller and microprocessor have no SPI interface, the shortcut is to integrate an SPI core to the chip.In this thesis, a high speed reusable SPI bus is designed based on the universal SPI specification. In the design, the variables are supposed to be parameters, which can be altered easily in the project (application), embodies the reusability sufficiently.Due to the lack of responsion mechanism, SPI calls for strict timing order. Thus a special clock-generate model including divider of even and odd integer is designed, which can generate a stable and reliable synchronous serial clock.The spi_shift model, which performs parallel data conversion for serial and reverse direction, has a simple circuit. Although it needs only a few hardware, it is characterized with strong function, for example, the maximum bit of each transfer is variable, up to 128; the transmission speed is faster than other components based on SPI specification.The algorithm of the high speed reusable SPI is implemented with Verilog HDL, adjusted with QuartusП, simulated and verified with ModelSim finally.更多还原