【作者】 朱定飞；

【导师】 李少青；

【作者基本信息】 国防科学技术大学 ， 软件工程， 2006， 硕士

【摘要】 X微处理器是一款结构异常复杂的微处理器,它的内部包含有:Cache、微码ROM、指令预取部件和动态分支预测部件、指令译码部件、整数部件、多媒体部件、浮点部件、分段和分页部件、总线接口部件、双处理器接口部件、可编程中断控制部件等。对于一个结构如此复杂的微处理器,若要仅仅依靠外部测试得到预期的故障覆盖率,是一件非常困难的事,因此必须在芯片中增加内建自测试设计。本文深入研究了目前国际上各种自测试设计技术和方法,根据X微处理器的特点和其对测试的具体需求,提出了一整套X微处理器的内建自测试设计方案。该方案充分考虑了X处理器的内部结构,有针对性的选择了一系列成熟可靠的自测试技术和方法,并充分利用X处理器所具有的处理能力和CPU特有的地址、数据总线及其调测试结构,在尽量少的硬件开销的前提下,提供了很高的测试覆盖率和故障覆盖率,很好的满足了X处理器对测试的需求。同时还具体实现了这套自测试方案,构造了完整的X处理器的自测试结构,应用于X处理器上并流片成功。X微处理器的内建自测试分为结构自测试和微码程序自测试两阶段。在结构自测试阶段,对处理器的指令流通路、微码rom以及其它一些重要电路进行了测试;在微码程序自测试阶段,通过事先存储的微程序,对处理器指令部件、各功能部件以及各大型存储单元阵列进行了测试,同时实现了对处理器控制通路和数据通路的测试,从而使高达70%的硬件得到了覆盖;通过对自测试过程的精心组织以及自测试逻辑与芯片扫描结构的有效整合,为用户提供了非常方便的自测试使用和诊断手段。更多还原

【Abstract】 X processor is a very much complex microprocessor, which contains Caches, microcode ROM, instruction prefetch unit, dynamic branch prediction unit, instruction decode unit, integer unit, multi media extension unit, floating point unit, segment and page management unit, bus unit, dual processor unit and APIC. For such a complex microprocessor, only relying on extern test to achieve desired fault coverage will be very impractical, thus, we must embed the built-in self logic in it to improve the processor’s testability.In this paper, based on the study of all kinds of BIST technologies and ways prevailing currently in the world, a scheme of the design of BIST oriented to the X microprocessor’s features and specified test requirements is proposed. This scheme considers the internal structure of X microprocessor fully, as well as the processor’s processing ability, address-data bus architecture and its debugging and testing logic. So this BIST design can provide very high test coverage and fault coverage at a very low hardware cost and meets the X processor’s testing demand very well. And this BIST design has been realized on the X processor which has been tapped out and functions correctly.The X processor’s built-in self test is partitioned into two stages: structural BIST and microcode BIST. During structural BIST, the X processor’s instruction flow path, microcode ROMs and some other important circuits are tested; during microcode BIST, the X processor’s instruction unit, all function components and large memory arrays are tested by the microcode programs which have been stored in the microcode ROMs in advance, and processor’s control path and data path are also tested at the same time. About 70 percent of the processor’s logic is covered during BIST; by organizing the BIST process carefully and utilizing the processor’s scan structure effectively, we provide a very convenient BIST use and diagnosis interface.更多还原