SAR回波模拟器DSP软件的设计及实现

【作者】 蔡昌听；

【导师】 皮亦鸣；

【作者基本信息】 电子科技大学 ， 信号与信息处理， 2007， 硕士

【摘要】 合成孔径雷达(SAR)回波模拟技术是合成孔径雷达设计、研制和测试的必要手段,回波模拟技术已经成为当前的一个热点研究课题。由于SAR回波模拟器具有实时性要求高、运算量非常大等难点,一直制约着其进一步发展。虽然目前已有基于点目标和简单分布目标的回波模拟器系统,然而其应用领域非常有限,尚待进一步研究和完善。本文根据SAR原始回波信号生成算法及DSP并行处理技术的相关研究成果,结合SAR回波信号模拟器的实际需求,完成了SAR回波信号生成板中DSP软件模块的设计和实现。回波模拟系统基于四片ADSP-TS203S芯片组,研究内容主要包括以下几个方面:1.研究了SAR回波模拟的相关理论,重点介绍了当前较成熟的距离时域脉冲相干(RTPC)和距离频域脉冲相干(RFPC)回波模拟算法,详细分析了这两种算法的原理和特点。2.重点研究了四片ADSP-TS203S芯片组的并行处理技术及DSPs间的协调处理技术,包括任务分配、同步、通信等。完成了各片DSP的片内存储器配置,实现了系统的初始化、指针控制、制表、处理、通信等各个模块的功能。设计了DSP与主机及FPGA模块的接口协议,完成系统的整体流程及时序设计,并基于VisualDSP++ 4.5平台用汇编语言完成系统软件的编写。3.完成了各模块以及整体系统的调试,并对系统的制表、处理等核心模块的运算时间进行了定量的测试。分析了系统的并行处理性能,同时在Matlab环境中验证了并行处理板所产生的目标信号的成像效果。研究结果表明:采用高性能的DSP芯片组,应用并行处理技术能较成功解决以往回波模拟器中存在的实时性差,运算能力不够等关键问题。系统测试得到的主要指标不仅能满足项目的设计要求,并且还有一定的裕量。更多还原

【Abstract】 At present, more and more people focus on the research of Synthetic Aperture Radar (SAR) echo signal simulator, which is an important instrument for the design, research and test of SAR system. But the high real-time requirements and extremely large computation restricts its development. The realized SAR echo signal simulator based on point target and simple distributed target now, however, its application scopes is very limited, and requires further study and more research.According to the generation algorithms of SAR echo signal and the development of DSP parallel processing technique, algorithm research and DSP module realization are done in this thesis. The system is based on four ADSP-TS203S; the main works includes the following areas:1. The theory of SAR echo signal simulator and algorithms of RTPC (Range Time Domain Pulse Coherence) and RFPC (Range Frequency Domain Pulse Coherence) are focused on, the principle and characteristic of those algorithms are analyzed.2. The parallel processing and cooperative processing technique of multi-DSP (include synchronization, communications between DSPs etc.) are researched. The moulds such as initialization, pointer modification, table, processing, communications, Host, FPGA etc. are realized. The internal memory of DSPs is schemed and the tasks and flow of the multi-DSP system are designed. The software of all moulds is achieved in assemble language based on the environment of VisualDSP++ 4.5.3. The computation time of key modules (such as table, processing etc.) is quantitative tested. The system as well as the software of all modules is debugged, the parallel processing ability is analyzed and the imaging result is validated in Matlab.Due to the high processing ability and parallel technique of DSPs, the problem of large computation and non-real time are solved. The result illustrates that: this system we realized not only meets the requirement of project, but also is more powerful in the parallel processing ability.更多还原