8位高速电流舵型DAC电路研究与设计

【作者】 刘卫平；

【导师】 兰中文；

【作者基本信息】 电子科技大学 ， 微电子学与固体电子学， 2006， 硕士

【摘要】 通过阅读大量文献,较为全面地概括了数模转换器(DAC)的国内外动态,介绍了DAC的基本原理和结构,分析了DAC主要误差来源和模型,对几种典型的DAC结构进行了详细的分析,并设计出一个8位高速DAC。通过对温度码和二进制码这两种不同DAC结构的讨论,针对高速要求,将本次设计结构确定为温度计码电流舵DAC;并进行了原理分析和电路设计以及版图设计,建立了完整的电流型DAC转换器基本子电路单元和仿真方案。仿真结果显示,DAC的转换速率到达500 MSPS,积分非线性误差和微分非线性误差均小于0.5LSB。在奈奎斯特(Nyquist)频率下,无杂散动态范围(SFDR)达68dB,总谐波失真(THD)达-61dB。在保证转换精度前提下,采用温度计码电流舵结构可以明显提高DAC采样速率和动态性能。在电路结构上,提出了单位电流源中的开关差分控制信号交叉点的最优值,并在差分开关上叠加一对常开PMOS管,有效减小了输出毛刺面积,改善了动态性能。讨论了有关DAC的一些基本设计思路和手段,并针对分段式结构高速DAC的一些常见问题,进行了理论分析、数学建模和模拟仿真。给出了实际的电流源、开关、偏置、带隙基准等单元子电路的设计结果以及仿真结果。更多还原

【Abstract】 A general introduction on Digital-Analog Converter study of domestic and aboard is presented. DAC principle and structures, and different converters such as current converting and voltage converting are analized.A 8-bit high speed DAC is designed. Based on the study of binary weighted DAC and thermometer-coded DAC, a thermometer-coded current-steering DAC is adopted. The principle, sub-circuit and layout of this DAC are also presented. The converter has the thermometer-coded architecture.This architecture implements the 8-bit DAC and achieves a good performance of dynamic character. This sample rate of this converter can be up to 500Msps. The SFDR and THD are up to 68dB and -61dB. The INL and DNL are smaller than 0.5LSB.The Structure of the converter is improved based on traditional one so that the area of glitch is reduced sharply and the dynamic character is improved.Some of the basic design theory and technology are presented. The basic cell architectures implemented in DAC are also presented. To improve the DAC, some of the cell architectures have to be designed carefully. The details of those cells are described. The actual circuit of current source, switch,bias and bandgap is presented.更多还原