基于JTAG的在系统编程和硬件调试研究与应用

【作者】 戴卫彬；

【导师】 伏云昌；

【作者基本信息】 昆明理工大学 ， 物理电子学， 2005， 硕士

【摘要】 JTAG是一种重要的调试架构,已被电子电器工程师协会收录并作为集成电路设计标准,被命名为IEEE Std.1149.1。JTAG在嵌入式系统开发过程中扮演越来越重要角色。在没有任何初始化程序的目标系统上,如何下载程序到目标开发系统的存储器中,唯一方便的方法是用JTAG进行在系统编程,诸如bootloader之类的初始加载程序都是通过JTAG下载的。由于JTAG设计的巧妙,能通过它实现调试功能,在进行软件开发时,软件仿真和调试不能满足实时的需要,基于JTAG的硬件仿真作用显得优为突出。所以,对基于JTAG的在系统编程和硬件仿真的研究具有十分现实的意义。 在本文中,首先详细介绍JTAG的硬件结构及其工作原理,因为它是后续工作的基础。 接着介绍主机与JTAG硬件通讯渠道的设计考虑和研究。在硬件架构确定的基础上,给出了控制JTAG工作的软件实现。 随后,以一个具体的目标系统展示了本毕业设计主题之一:基于JTAG的在系统编程,完整地给出其软件实现。 最后,对Intel（?）XScale^TM核的调试架构作详细的介绍,并对运行在Intel（?）XScale^TM核上的调试代理程序和运行在主机上的调试器的设计做了充分的考虑,以使二者严格同步通讯。在此基础上,通过JTAG访问CPU寄存器和存储器得以实现,也可直接下载调试代码进入指令Cache,而实现硬件调试。更多还原

【Abstract】 JTAG is a important type of debug architectures, which has been registered as one of IC designing specifications named IEEE Std.1149.1. JTAG is playing a important role at the embedded-system development. In the target system without any initialization program, the download of the initialization code to its processor is usually achieved through the in-system program, and the initialization code, such as bootloader, is downloaded through JTAG Due to the advisable design, the methods of using JTAG are extended. When developing embedded-system software, because for the default of software emulation and debug hardware emulation based on JTAG is highlighted. So, the research and application of the in-system program and hardware emulation based on JTAG indicate its important meanings.In this paper, firstly, the architecture and principle of JTAG are introduced in detail that the following works are carried on without it.Secondly, the design of the communication channel between Host and JTAG port is token account. Above all, the software achievements of controlling and running JTAG for some key technology are provided.Third, the in-system program based on JTAG is lied out which is one of the studies in this paper. Perspicuously, the software achievements are still keys.Lastly, the debug architecture about Intel（?）XScale^TMcore is introduced in some degree. In addition, the debug handler which running on the target CPU and the debugger which running on Host are thought better of ,so that they can assort better with each other. When the debugger and debug handler can communicate synchronously by JTAG hardware, accessing CPU registers and dynamically downloading code into instruction Caches are implemented, the hardware debug is achieved.更多还原