基于FPGA的混沌加密芯片技术研究

【作者】 陈红；

【导师】 王执铨；

【作者基本信息】 南京理工大学 ， 控制理论与控制工程， 2004， 硕士

【摘要】 利用混沌的对初值和参数敏感、伪随机以及遍历等特性设计的加密方案，相对传统加密方案而言，表现出许多优越性能，尤其在快速置乱和扩散数据方面。目前，大多数混沌密码倾向于软件实现，这些实现方案中数据串行处理且吞吐量有限，因而不适合硬件实现。 本论文分别介绍了适合FPGA(现场可编程门阵列)并行实现的序列密码和分组密码方案。序列密码方案，对传统LFSR(线性反馈移位寄存器)进行改进，采用非线性的混沌方程代替LFSR中的线性反馈方程，进而构造出基于混沌伪随机数发生器的加密算法。分组密码方案，从图像置乱的快速性考虑，将两维混沌映射扩展到三维空间；同时，引入另一种混沌映射对图像数据进行扩散操作，以有效地抵抗统计和差分攻击。 对于这两种方案，文中给出了VHDL(硬件描述语言)编程、FPGA片内功能模块设计、加密效果以及硬件性能分析等。其中，序列密码硬件实现方案，在不考虑通信延时的情况下，可以达到每秒61.622兆字节的加密速度。 实验结果表明，这两种加密算法的FPGA实现方案是可行的，并且能够得到较高的安全性和较快的加密速度。更多还原

【Abstract】 Due to the exceptional properties of chaos such as the sensitivity to initial conditions and parameters, the pseudo-randomness and the ergodicity, chaos-based algorithms have shown their superior performance, especially in swiftly shuffling and diffusing data, which quite superior to traditional schemes of cryptology. However, most currently existing chaotic ciphers are intend to be implemented in software, by which the data are processed sequentially and the throughput is limited, thereby are not suited to hardware realization.In this thesis, two chaos-based parallel cipher schemes that accommodate to FPGA (Field Programmable Gate Array) implementation are presented: one belongs to stream cipher, and the other one belongs to block cipher. The proposed stream cipher scheme is inspired from LFSR (Linear Feedback Shift Register) but differs in the feedback mechanism: the later uses a linear feedback function while the former uses a nonlinear chaotic one. In the block cipher scheme, the two-dimensional chaotic cat map is extended to general 3D for designing a faster image encryption scheme. Besides, the diffuse-mechanism is also used in the scheme, thereby significantly increasing the resistance to statistical and differential attacks.Issues concerning VHDL (VHSIC Hardware Description Language) programming, internal function modular description, encryption results and performance analysis of the encryption chip are reported. Simulation results show that the throughput of the stream cipher can reach high up to 61.622MB per second under the circumstance of not taking the communication delay into account.Experimental tests show that the attempt of applying the two chaotic encryption schemes to hardware implementation is feasible, and can acquire high security and fast encryption speed.更多还原