节点文献

DVB-C接收芯片中数据同步的设计及实现

【作者】 袁锦辉

【导师】 朱小富;

【作者基本信息】 浙江大学 , 通信与信息系统, 2003, 硕士

【摘要】 数字高清晰度电视(Digital HDTV)作为第三代电视标准,已成为当今世界高技术竞争的焦点,对世界的政治、经济和文化将产生巨大而深远的影响。本文着重于有线视频广播系统(DVB-C)传输系统中符号的同步定时原理及其在专用集成电路芯片(ASIC)上的实现。本文第一章首先概述了高清晰度电视的发展历史,接着重点介绍了DVB-C有线电视传输系统,并对专用集成电路(ASIC)设计的发展、将来的设计趋势等作了概述。第二章叙述同步定时算法的理论基础。主要讨论了基于内插思想的同步恢复的理论;在此理论的基础上对整个内插环路做了理论分析。第三章讲述了基于内插思想的同步环路设计。在此章中,首先是详细地讨论了环路中各个参数的计算;接着是对各种参数和结构进行了性能仿真,并由此决定了环路的结构。第四章主要是结合芯片设计的流程,详细介绍了内插环路的ASIC实现,并给出了设计过程中的一些思想和方法。本文的主要贡献在与根据锁相环的思想,对同步内插环路做了具体的分析,确定了环路结构、并给出了整个环路的参数计算方法。

【Abstract】 Digital High Definition Television (HDTV) utilizes several most advanced practical technologies in the world,such as advanced compression coding technologies and audio & video technologies. It is representative of the third generation television,and will have an important influence on the lives of people in the future. This thesis deals with the algorithm of synchronization and its DVB-C (Digital Vision Broadcasting - Cable) implementation. The synchronization is used in the DVB receiver of HDTV Cable Broadcasting Transmission System.The main contents of this thesis are at a glance:Chapter 1 serves as an introduction to the subject. After an overview of Digital HDTV,DVB-C system is discussed in detail. EDA design method is also introduced at last.Chapter 2 discusses the principle of synchronization. The emphasis is placed on the analysis of timing loop based on interpolation.Chapter 3 treats the design of the timing synchronization loop. At first,it introduces the method of loop parameters,including gain of phase detecting,gain of loop filter and frequency sensitivity,then simulations are done under different structures and parameters. According to the results of simulation,loop structure is decided.Chapter 4 illuminates the ASIC project of synchronization. In the same time,the flow of ASIC front-end design is introduced;it also lists some skills and ideas in the work.The main contributions of this paper are proposing the algorithm and realization of synchronization in DVB-C,and calculating the technical parameters of synchronization loop.

【关键词】 DVB-CHDTV同步内插ASIC
【Key words】 DVB-CHDTVSynchronizationInterpolationASIC
  • 【网络出版投稿人】 浙江大学
  • 【网络出版年期】2003年 01期
  • 【分类号】TN941.3
  • 【被引频次】1
  • 【下载频次】194
节点文献中: 

本文链接的文献网络图示:

本文的引文网络