LVDS高速I/0接口芯片FTLVDS的设计与实现

【作者】 刘祥远；

【导师】 陈书明；

【作者基本信息】 国防科学技术大学 ， 计算机科学与技术， 2002， 硕士

【摘要】 随着体系结构技术和半导体工艺的发展，集成电路芯片上的时钟频率提高很快，芯片内外的数据传输速率差异已经成为影响系统性能的一个瓶颈。 低电压差分信号LVDS是一个用于高速信号传输的国际通用接口标准，同时具有高速度、低噪声、低功耗和低成本的突出优点。LVDS高速I／O接口单元是高性能计算机和通讯电子设备中重要的构件，能够在广泛的应用领域里解决高速数据传输的瓶颈问题。本课题所设计的LVDS高速I／O接口芯片FTLVDS，正是对解决这一瓶颈的有益尝试。 FTLVDS芯片采用了“自顶向下”和“由底向上”相结合的正向设计方法。该芯片的功能包括LVDS信号的收发以及CMOS数据的串并转换。芯片可划分为LVDS驱动器、LVDS接收器、串行化器和解串行器四个模块。根据这些模块的功能及特点，分别采用了不同的设计方法来实现。 收发模块LVDS驱动器和接收器是LVDS高速I／O接口芯片的关键电路，采用全定制的方法设计，也是本课题的重点。课题着重对这两个模块的电路结构以及版图结构进行了深入的研究和分析，并采用SPICE工具进行了模拟验证。 串并模块串行化器和解串行器采用标准单元的方法设计，论文讨论了对几种时钟同步模式以及串并转换电路结构的权衡和实现，并对所设计的电路结构进行了Verilog模拟验证。 FTLVDS芯片是收发模块和串并模块的组合，其版图实现采用了全定制单元和标准单元混合的设计方法，并且进行了投片封装。 本课题对LVDS高速I／O接口单元芯片FTLVDS的自主设计研究，作为国防科技重点实验室基金项目“高速数字信号互连与信号传输技术”的一部分，一方面为进行高速数字信号传输的研究提供了不可缺少的实验依据和硬件基础，另一方面也是对IC芯片正向设计中采用全定制和半定制的混合设计方法的一次有益探索。更多还原

【Abstract】 With the great development of the technology of computer architecture and the technology of semiconductor,the frequency of the timing clock in the 1C chips has been faster and faster. Then the difference of data transmission speed between inside and outside of current CMOS chips has been a bottleneck influencing the performance of computer systems.LVDS(Low Voltage Differential Signaling) is an international common interface sdandard that applied to high speed signal transmitter. The high speed LVDS I/O interface cell is an important component of high performance computers and communication electronic equipments,and is helpful to solve this bottleneck problem in the extensive application fields. The high speed LVDS I/O interface chip FTLVDS that we designed in the task is an useful taste to solve the bottleneck.We design the chip FTLVDS by means of "top-down" and "bottom-up" mixed tecknique. The chip’s function includes transmitter-receiver of LVDS signal and serializer-deserializer of CMOS digital signal. The full chip can be partitioned to four modules,LVDS driver,LVDS receiver,serializer and deserializer. We implement these modules with different approaches based on their fuctions and characters.The LVDS driver and LVDS receiver designed by the means of full custom design approach,are not only the most important circuits in the chip FTLVDS but also the emphases of the task. The paper has an emphatical discussion on the study and analysis of the circuit structure and layout structure of these two modules,and makes a lot of SPICE simulation and verification.The serializer and deserializer moduls in the FTLVDS chip are designed by the way of standard cell design approach. The paper emphatically discusses the tradeoff and the implementation of several clock synchronization modes and circuit structures,and makes a lot of Verilog simulation and verification on the circuits designed.The whole FTLVDS chip is a combination of LVDS driver,LVDS receiver,serializer and deserializer. It’s layout is implemented by the means of full-custom and half-custom mixed design approach,and the chip is taped out.This task of self-determination design of high speed LVDS I/O interface chip,as a part of the project "high speed digital signal interlink and transmit technology" on the foundation of National Laboratory For Parallel & Distributed Processing,on the one hand provide absolutely necessarily experiment foundation and hardware elements for the research of high speed digital signal transmission,on the other hand make an available exploration for the forward design methods of IC chips by means of full-custom and half-custom mixed designapproach.更多还原