ATSC-8VSB接收芯片中时钟同步的设计及实现

【作者】 王志斌；

【导师】 王匡；

【作者基本信息】 浙江大学 ， 通信与信息系统， 2002， 硕士

【摘要】 数字化高清晰度电视(HDTV：Uigh Definition Television)是先进的压缩编码技术和音视频技术的结合，是第三代电视的标志，具有划时代的意义。 本文所研究的正是HDTV地面广播系统VSB方案接收机中同步的算法及其在专用集成电路芯片(ASIC)上的实现。该芯片用于实现对美国ATSC-8VSB的信道接收。 主要内容如下： 第一章简要介绍了ATSC-VSB地面广播系统及深亚微米下的EDA设计方法。 第二章主要讲述了锁相环的工作原理，着重于理想二阶锁相环的分析。通过对理想二阶环的跟踪特性、噪声特性、捕获特性的分析，得出环路的设计及环路参数的最佳化。 第三章首先论述了最佳位同步环的原理，以及数据辅助位同步环的实现，并结合无码间干扰的基带传输特性及ATSC-VSB的特点，提出了HDTV中位同步的实现方案。并且对段同步检测、自动增益控制也进行了分析，描述了硬件实现。 第四章主要论述了场同步、NTSC干扰与抑制的基本原理，以及相应的硬件设计。 第五章是仿真同步的算法，分析仿真的结果。之后阐述了同步的ASIC实现，其中以场同步相关运算为例，提出了硬件及ASIP(应用专门指令集合处理器)的两种实现方案，并对两种方案进行比较。 本文的主要贡献在于根据VSB方案中的技术参数，提出了HDTV同步的算法，并结合ASIC设计的特点给出了具体的实现方案。更多还原

【Abstract】 Digital High Definition Television (HDTV) utilizes several most advanced practical technologies in the world, such as advanced compression coding technologies and audio & video technologies. It is representative of the third generation television, and will have an important influence on the lives of people in the future.The thesis deals with the algorithm of synchronization and its ASIC (Application Specific Integrated Circuit) implementation. The synchronization is used in the VSB receiver of HDTV Terrestrial Broadcasting Transmission System. And this chip is used for the channel receiver of stateside ATSC-8VSB scheme.The main contents of this thesis are at a glance:Chapter 1 serves as an introduction to the subject. After an overview of ATSC-VSB Terrestrial Broadcasting Transmission System, EDA design method using DSM technique is introduced.Chapter 2 discusses the principle of PLL (Phase Locked Loop). The emphasis is placed on the analysis of two orders PLL adopting active proportion integral filter. After analyzing track performance, noise performance, and capture performance, the chapter draws a conclusion about how to design PLL and how to select the parameters the best for the loop.Chapter 3 treats the principle of the best tuning synchronization loop, and the realization of the Data-Aided timing synchronization loop. Together with the characterization of band-limited signals without biter Symbol Interference and the one of ATSC-VSB signals, the chapter proposes a scheme for implementing timing synchronization loop used in HDTV. The chapter also treats the recovery of Data Segment Sync, the theory of AGC (Automatic Gain Control), and their hardware designs.Chapter 4 is devoted to Field Sync Recovery and comb filter for the rejection of NTSC co-channel interface.Chapter 5 is focused on simulation of the synchronization algorithm and analysis of the results. After that, the chapter illuminates the ASIC project of synchronization. At last, the chart demonstrates two different implementation schemes that are hardware and ASIP (Application Specific Integrated Processor) for Field Sync correlative calculation.The main contributions of this paper are proposing the algorithm and realization of synchronization in HDTV, according to the technical parameters of VSB scheme.更多还原