【作者】 李鸿雁；

【导师】 李肇基；

【作者基本信息】 电子科技大学 ， 微电子学与固体电子学， 2001， 硕士

【摘要】 智能功率集成电路（SPIC）的出现对提高系统的可靠性，降低其成本、重量和体积，实现汽车、工业、通讯等领域中系统的小型化、智能化有着重要的意义。本文研制成功了一种可广泛用于大功率电机控制、开关电源等应用中的SPIC电路—三相高压功率MOS栅驱动集成电路，其设计指标要求为：最高偏置电压（VOFFSET（max））为500V、最大输出电流（I_o（max））为1A、最高工作频率为100KHz。该电路已进行了工艺实验，获得了满意的结果，其研究成果已经转让给信息产业部电子24所。在高压器件研究中，提出了一种外延层厚度为10μm采用N埋层结构薄外延高压LDMOS器件，对进一步改进驱动电路的工艺有着积极的意义。主要工作包括：驱动电路的电路设计；耐压为1000～1200V的高压LDMOS器件研究；驱动电路的高低压兼容工艺设计和器件与电路的版图设计；高压器件与驱动电路的工艺实验。 在电路设计中，作者分析了功率器件对驱动电路的要求，设计了驱动电路的总体结构。对电路关键参数高低压电平位移脉冲宽度、高端滤波电路滤波宽度的设计及在LDMOS源端加入限流电阻的必要性进行了重点分析，完成了各单元电路的设计。最后给出了该驱动电路的典型应用图。 在高压器件研究中对与现有工艺相兼容厚外延LDMOS进行研究，该结构采用分段变掺杂多区P~-降场层，有效降低器件的表面电场，缩短器件的漂移区长度，增大P~-降场层注入剂量的选择范围，并有效地抑制界面电荷Qss对器件耐压的不利影响。针对目前厚外延工艺的缺点，提出的薄外延LDMOS采用N埋层，通过优化N埋层长度、注入剂量可提高器件耐压。通过MEDICI模拟对两种器件进行比较，结果为两种器件耐压相当，薄外延LDMOS导通电阻略低。 以标准的2μm P阱CMOS工艺的基础，参考了国际上流行的BCD工艺，结合本电路的特殊性，本文设计了驱动电路的高低压兼容工艺，并制定了版图设计规则，完成器件与电路的版图设计。 完成了高压器件与驱动电路的工艺实验。测试结果表明，器件和电路的各项参数均以达到甚至超过了设计指标要求。更多还原

【Abstract】 The emerging of smart power integrated circuit (SPIC) is important to increase the system抯 reliability and reduce its cost, weight and volume. It enables the design and production of even more miniaturized and smart systems for different applications in the field of automotive, industrial and telecommunication. In this paper, a three phases high-voltage power MOS gate drive integrated circuit has been researched and designed successfully. It is a typical SPIC, which could be widely used in high power motor control and switching power supply applications. The design goal of the circuit are V0FFsET(max) is 500V, Ia(m~) is 1 A, the highest frequency of operation (f(~x)) is 100KHz. The drive circuit抯 experiment has been done and the result is satisfied. Now this circuit has been transferred to Sichuan Solid-State Circuit Institute. A thin epitaxial layer (10gm) LDMOS device used N-burry layer structure was proposed in the paper during the high-voltage device design, which is helpful to improve the drive circuit抯 technology. The main work of the author includes the drive circuit design, research of high-voltage LDMOS device which breakdown voltage is 1000-1200V, the drive circuit抯 technology design and layout design, technology experiments of device and circuit.During the circuit design, author analyzed the requirement of the driver for power device, and designed its general structure. The design of the circuit抯 key parameters including pulse width in the level shifter part and delay time of the filter circuit, and the necessity to add a limiting current resistor at source the LDMOS were emphatic analyzed. Author finished the design of each sub-circuit. The circuit抯 typical applicative connection was given at last.During the high-voltage device design, the thick epitaxial layer LDMOS which is compatible with current technology was researched. This device used piecewise VLD and multiple region structure F reduce field layer. The using of the F reduce field layer effectively reduce the surface electric field of the device, shorten the length of its drift region, enlarge the choice of range of the ion implant dose of the P layer, and effectively restrain the disadvantageously affection on the breakdown voltage of the interface charge Qss. Consideringthe shortcoming of thick epitaxial layer technology, author proposed a thin epitaxial layer LDMOS used N-burry layer. Through optimizing the N-burry layer抯 length and impurity dose will increase the device抯 breakdown voltage. The two structure LDMOS was compared by simulation with MEDICI software. The result is that their breakdown voltage is almost the same and the thin epitaxial layer LDMOS抯 Ron is lower.Based on the standard 2j.im P-well CMOS technology, after referenced the epidemical BCD technology in the world and considered the specialty of the circuit, the drive circuit抯 high and low voltage compatible technology was designed. Author also formulated the design rules and finished the device抯 and circuit抯 layout design.Author has accomplished the experiments of high-voltage devices and drive circuits. The test results show that each parameter of the devices and circuits fulfihle the anticipative demand; some parameters even exceed the demand.更多还原