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数字化变电站合并单元硬件设计与实现

Hardware Design and Implementation of Merging Unit for Digital Substation

【作者】 王亚庆

【导师】 陈小川;

【作者基本信息】 西南交通大学 , 电力系统及其自动化, 2013, 硕士

【摘要】 随着近年来电力产量的持续增加和电力系统规模的不断扩大,传统变电站综合自动化技术已经不能满足目前电力系统智能化发展的要求,推广和建立基于IEC61850标准的数字化变电站是电力系统技术发展的未来走向,也是目前我国电力系统研究和发展的热点和重点之一。论文的设计任务围绕合并单元需要实现的功能展开,而整体思路则是以合并单元的硬件设计为出发点。首先介绍了数字化变电站的系统结构,并简述了合并单元的研究意义。在分析比较IEC60048-7/8和IEC61850-9标准后,采用IEC61850标准作为本合并单元的设计依据。其次分析了合并单元的各种同步方案,提出了由IRIG-B码和PPS秒脉冲作为同步信号的基准,利用ADSP和FPGA双处理器架构的合并单元硬件设计方案。合并单元以BF536和EP2C8为核心处理器,在最小运行系统的基础上,利用AD7606、MT48LC4M16A2、SST39VF和88E6060等芯片,进行必要插件和系统电路的扩展,从而完成数据同步接收、数据处理和数据发送等工作。本文根据模块化设计思路,分析了各个插件和所需模块的功能和原理,并按照器件选型、原理分析和PCB设计的顺序展开论述。本文对合并单元整体硬件原理设计的同时,还进行了PCB板电路的设计,并通过信号完整性仿真软件对所设计的印刷电路板进行信号仿真。最后,本文根据ADSP和FPGA的集成开发环境,简述了对合并单元的调试。

【Abstract】 Recently, with the increasing of electrical production and the expansion of power system’s scale, automation technology of traditional substation can’t meet the digital and intelligent development demands of power grid. Then the popularizing and establishing of digital substation which is duo to IEC61850standards will be the developing trend of power system, it is also the hot spot and emphasize of power system’s research and development in our country. Therefore, researching and developing Merging Unit of the digital substation has great importance and engineering value.The design task of this issue is to revolve the function needs to achieve of Merging Unit, and the hardware design of MU is staring point of the whole idea in this article.Firstly, this paper introduces system structure of digital substation, then descripts the implications for research of MU. After analyzing and contrasting IEC60048-7/8standards and IEC61850standards, this paper puts forward using IEC61850standards as the design’s basis. Secondly, this paper analyzes some synchronous plans of MU, putting forward uses IRIG-B and PPS as the datum of synchronous signal. The design is based on ADSP and FPGA structure.BF536chip and EP2C8chip are the core processors in MU. Based on the minimum operating system, the expansions in the necessary plug-in and system circuit are according to some chips such as AD7606, MT48LC4M16A2, SST39VF,88E6060and so on, thus the MU completes the task of data synchronous reception, data process and data transmission. According to modular design ideas, this paper analyses the function and principle of all plug-ins. Each section has been discussed according to the order of choosing devices, principle analysis and circuit design.When designing the MU’s hardware and principle, this paper also designs PCB of MU, and using signal integrity simulation tools to emulate the signal of PCB. At last, according to the development circumstance of ADSP and FPGA, this paper introduces the commissioning of MU.

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