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超声相控阵换能器阵列延时电路设计

Design and Realization of Delay Circuit in Ultrasonic Phased Array System

【作者】 侯军辉

【导师】 王黎;

【作者基本信息】 西南交通大学 , 光学工程, 2012, 硕士

【摘要】 近年来,随着电子技术、计算机技术和材料工艺等技术的发展,相控阵检测开始大量应用在工业无损检测中。由于相控阵声束聚焦可以由软件进行调节,不需要复杂的自动控制设备进行转换,声束聚焦可以灵活控制,而且聚焦点的声波是由多路通道超声波相干叠加形成的,抗干扰性能很强,使得其应用前景十分广阔。相控阵聚焦是超声波检测的关键技术,决定了波束聚焦的质量和检测分辨能力,是相控阵技术的重点研究方向,因此有重要的意义。本文设计了延迟电路,实现换能器阵列的算法,完成了实验验证,并对信号进行了分析处理。首先在详细调研了国内外已有超声相控阵技术基础上,结合列车构件外形尺寸的测量的无损检测要求,采用了几何相位方法,设计了相控阵换能器系统的总体方案,包括系统的外形结构、硬件控制电路方案和总体数据处理流程。根据硬件电路方案完成了电路的各个模块设计和调试,包括:电源模块、FPGA外围电路与配置电路、精细延迟电路、功率放大电路、功率匹配电路、声波接收电路和信号处理模块等。其次利用FPGA和高精度延迟线芯片设计了超声相控阵聚焦功能模块,实现了相控阵聚焦算法。在FPGA方而,设计了电路各通道的粗延迟功能,并完成了相应的逻辑控制功能。在精延迟方面,结合上位机的计算功能,完成了相控阵电路的精细延迟功能,提高了延迟的精度。设计完成了功率放大电路,实现电压放大和功率放大,激励换能器产生超声波。最后,在MATLAB环境下对相控阵聚焦算法进行了分析和验证,理清了各要素之间的关系。搭建实验系统,在硬件电路上对聚焦算法进行了实验验证,调试功率放大电路,产生了符合指标要求的高电压脉冲序列。对实验数据进行了处理和误差分析。实验结果表明所设计的超声相控阵系统具备可靠的测量精度和扫查速度。

【Abstract】 With the fast development of electronic and computer technology in recent years, ultrasonic phased array technology is more and more used in nondestructive detecting. For the merits such as simple mechanical scan equipment, flexibility in controlling sound beam, coherent addition and high signal to noise ratio, this kind of technology possesses wide application foreground. Ultrasonic focusing technique, which is the key point of phased array technology, is even vital in improving resolution and contrast ratio, thus becoming the main research direction and eventually hold great significance. In this thesis, delay circuit is designed and focusing algorithm is realized. With the verification work finished, the data obtained in experiment is processed and analyzed.On the basis of a detailed investigation of phased array technology domestic and abroad, the whole phased array system, which comprises external configuration, hardware controlling circuit, data process flow, is designed regarding train parts dimensions. According to the schematic, design and debugging of each module are finished in this paper.Secondly, the delay module is realized using FPGA and high resolution delay chip provided by AD company, thus invalidating the focusing algorithm. In aspect of FPGA, coarse delay function is achieved on the board, while in refined delay, resolution is improved. Power amplification circuit is also designed in the thesis to generate high voltage pulse and excite the transducer.Finally, the phased array focusing algorithm is simulated and verified in MATLAB environment, with good result obtained. The algorithm is debugged and verified on established hardware experimental system, with standard high amplitude pulse generated. The analysis results indicate excellent reliability and resolution of the phased delay circuit in this thesis.

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