【作者】 彭晴晴；

【导师】 孟令军；

【作者基本信息】 中北大学 ， 测试计量技术及仪器， 2012， 硕士

【摘要】 随着遥测遥感采集技术的迅速发展，大批量采集数据的有效传输已经成为当前无线遥测领域研究的热点问题。本文设计了一种基于NiosⅡ嵌入式处理器的遥测图像数据采集转发系统，实现了高速遥测图像数据的实时接收存储和有效转发。本文是在航天某项目“遥测图像采集转发装置”的支持下，围绕遥测图像采集系统中图像数据的传输、接收、存储和转发展开研究。综合基于FPGA的SOPC技术的发展现状，提出了采用嵌入式处理器NiosⅡ作为主控制器的系统设计方案。研究了LVDS高速数据传输和PCM数据转发接口的通信情况，实现了遥测图像的实时接收和连续转发。结合实际数据存储应用要求，研究了大容量高速PSRAM的存储特点，采用了并行位宽扩展的数据存储方式，实现了高速图像数据的大容量缓存。在系统核心逻辑设计中采用了SOPC技术的NiosⅡ处理器作为整个系统的主控制器，负责系统遥测图像数据的处理。通过了解SOPC技术的发展现状，详细研究了嵌入式处理器NiosⅡ的框架结构，在分析了Avalon总线接口规范的基础上，完成了SRAM控制接口的自定义实现。系统按功能组成采用了模块化的设计思想，数据接收模块负责接收LVDS数据，嵌入式处理器NiosⅡ负责整个系统的数据处理和控制，数据转发模块负责PCM数据转发。本系统针对LVDS数据传输，PSRAM数据缓存和基于FPGA的嵌入式系统控制进行了详细的讨论，给出了系统测试的流程，成功的完成了遥测数据的接收、存储和转发功能。测试结果表明系统工作稳定，性能可靠，具有一定的实用性。更多还原

【Abstract】 With the rapid development of telemetry acquisition technology, the effectivetransmission of mass-data have become the hot topic in current wireless telemetry researcharea. This paper has designed a telemetry image data acquisition and transmission systembased on the embedded processor NiosⅡ, which could receive the telemetry image data inreal time and retransmit it effectively.The paper research the transmission, receiving, storing and retransmission of the dataacquired from the telemetry image acquisition system, which is supported by an astronauticproject of the telemetry image gathering device. It proposes a plan that the design uses theembedded processor of NiosⅡas main controller, and it is based on the development ofSOPC technology of FPGA. We have studied the high-speed data transmission of LVDS andthe communication of digital interface for PCM, and achieved to receive telemetry imagedata in real time and retransmit it continuously. According to the actual requirements of datastorage, we have studied the large-capacity and high-speed storage characteristic of PSRAM.In the design, in order to achieve the purpose of high speed image data cache, we apply theparallel bit wide extended of data storage mode. As the main controller, NiosⅡis used toprocess telemetry image data in the system logic design. We have studied the structure ofNiosⅡprocessor according to the present development of SOPC and achieved to definecontrol interface of SRAM on the basis of analyzing the Avalon bus interface. The designhave applied modular concept that the receiving module used to receive data from LVDS,NiosⅡis used for the data processing and controlling of the whole system, and theretransmission module is used to retransmit PCM data. The paper have discussed the LVDS data transmission, PSRAM data cache andembedded system based on FPGA in detail, and achieved to receive, store and retransmit thetelemetry data. The procedure of system test has given in the paper, and the test results showthat the system is stable, reliable and practical in some way.更多还原