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高动态条件下捷联惯导动基座传递对准并行算法研究

The Research of Parallel Strapdown INS Transfer Alignment Algorithm for High Dynamic Conditions

【作者】 林灿龙

【导师】 吴铁军; 马龙华;

【作者基本信息】 浙江大学 , 模式识别与智能系统, 2012, 硕士

【摘要】 动基座传递对准是一种利用主惯导系统的导航解算信息,在对子惯导系统进行一次传递,装订解算初值后,通过一定的信息匹配方法(速度匹配、位置匹配、姿态匹配等)估计并校正子惯导导航解算误差,从而达到子惯导系统初始对准目的的捷联惯导系统对准技术。初始对准误差是高动态情况下惯性导航误差的主要误差来源之一。提高初始对准精度的一种可行的方法是提高其解算速率,本文针对高动态环境下进行传递对准时,由于导航计算机计算能力不足导致的导航精度难以提高的问题,利用FPGA的并行实现能力,设计了一套捷联惯导并行传递对准算法。本文对传递对准的原理进行了阐述,就传递对准原理、匹配方法及对准滤波估计方法展开了讨论,分析了初始对准误差对导航解算精度的影响,并给出了相关的传递对准仿真实验;设计了一种传递对准算法的并行导航解算算法,分析表明该并行算法可将大幅提高航解算的解算频率;设计了一种并行导航解算算的FPGA实现架构;给出了一种基于FPGA的速度加姿态传递对准卡尔曼滤波算法的脉动阵列设计;最后,通过对并行传递对准算法的FPGA实现和分析,验证了该方法的正确性和有效性。本文的主要创新点包括:(1)提出了一种捷联式惯导系统导航解算的并行解算算法,使导航解算算法适用于高动态情况下的高速解算需求;(2)提出了一种并行捷联惯导导航解算算法的FPGA实现框架设计,并在Xilinx Virtex5 FPGA上实现这一设计;(3)采用法捷耶夫算法和脉动阵列技术,通过矩阵补齐方法,设计了一种基于FPGA的一维脉动阵列结构来实现传递对准中的卡尔曼滤波器,提高了卡尔曼滤波器的解算速度,同时降低了其FPGA实现时的资源消耗。

【Abstract】 Transfer Alignment is the process of initializing a slave inertial navigation system(INS) using navigation data from the master navigation system. The process is accomplished by an one-shoot-transfer, then calculating the difference of navigation solution between the slave and master INSs to estimate the desired errors by a kalman filter or some other state estimator.Initial alignment error is one of the main navigation error derivations, especially in high dynamic conditions. In order to get a high navigation solution accuracy, increasing the navigation computation speed is a good method. In this thesis, a parallel strapdown INS transfer alignment algorithm is proposed to solve the problem of low navigation accuracy in high dynamic conditions cause by the computer calculation capability using FPGA’s strong parallel calculation feature.The strapdown inertial navigation system is introduced first. And then, In this thesis, transfer alignment technology and its matching methods are introduced, the effect of initial alignment error on navigation solution accuracy is analyzed, several simulations on transfer alignment are exhibited simultaneously. A parallel navigation computation algorithm is proposed, the analysis of this parallel algorithm shows that the design significantly increases the updating rate of the navigation computation; An FPGA architecture is proposed to implement the parallel navigation computation algorithm; a design of FPGA-based parallel kalman filter used in velocity and attitude matching transfer alignment using systolic array technology is proposed, to solve the problem of gigantic computation of kalman filtering algorithm; At last, an FPGA-based implementation experiment is performed to analyze and comfirm the the validity of the parallel transfer alignment algorithm.The main innovations of this thesis are listed as follow:(1)Proposing a parallel strapdown inertial navigation algorithm to meet the accuracy requirement of the navigation computation for high dynamic conditions.(2)Proposing a FPGA-based implementation method of parallel strapdown inertial navigation algorithm, and implementing the design on a Xilinx Virtex5 FPGA.(3)Using Faddeeva algorithm and systolic array technology and matrix complement method, a FPGA-based one dimension systolic array-based architecture is applied to implement the kalman filter in velocity and attitude matching transfer alignment. This architecture can improving the kalman filter updating speed, and reduce the FPGA resource ultilization at the same time.

  • 【网络出版投稿人】 浙江大学
  • 【网络出版年期】2012年 07期
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