【作者】 李渊清；

【导师】 张之圣；

【作者基本信息】 天津大学 ， 微电子学与固体电子学， 2010， 硕士

【摘要】 功能验证已经成为当今超大规模专用集成电路和系统级芯片项目开发的瓶颈。传统的定向测试验证方法已经不能满足对高复杂度设计进行完备验证的要求。为提高验证生产率,一系列先进的功能验证方法和验证语言得到了发展。在此基础上,验证方法学为模块和系统级验证提供了完整的解决方案,使验证平台能够具备更高的自动化程度和可复用性,从而提高了验证效率。本文研究了图像处理子系统的功能验证,该系统是课题组开发的多制式视频显示后处理芯片中的核心算法单元,用于在相同帧频下实现多种VESA视频制式之间的转换。本文以VMM验证方法学为指导,为图像处理子系统开发验证计划,确定需要覆盖检查的功能点。在验证平台的设计上,采用VMM验证方法学推荐的分层式验证平台结构,使用SystemVerilog语言自行开发验证组件,完成验证平台的搭建。本文研究的图像处理子系统验证平台能够生成36种VESA视频信号,支持对待测设计的输出时序和图像处理质量进行分析和评估。验证平台集成了约束随机化验证、功能覆盖率驱动验证、事务级验证和断言验证等先进的验证方法,同时,通过使用蓝图模式和回调技术,支持多种测试案例的生成,增强了验证环境的稳定性,提高了验证组件的可复用性。本文还研究和实现了一种动态约束修正技术,使验证过程中功能覆盖率的提升能够受用户控制,提高了验证平台的可控制性。仿真验证实践证明,本文研究的验证平台能够根据用户配置,执行随机验证和定向测试等多种测试案例,具有较高的自动化程度,能够有效提高验证效率。更多还原

【Abstract】 Functional verification has become the bottleneck of projects that developing Very Large Scale ASIC and System-On-Chip. Directed test, which is the traditional verification method, can not meet the requirement that verifying a complex design fully. For the purpose of obtaining higher verification productivity, a series of advanced methods and languages have been developed. Based on the above progress, the verification methodology offers a complete solution for Module-Level and System-Level verification, which improves the verification efficiency by making testbench more automatic and reusable.The functional verification for Image Processing Subsystem is studied in this thesis. This system, which is the core algorithm unit of a Multi-standard Video Post Processing Chip, is used to implement the conversion among multiple VESA video formats with the same frame frequency. In this thesis, the Verification Methodology Manual (VMM) is adopted as the main principle for developing verification plan that describes the function points to be covered. The testbench is built according to the layered structure which is recommended by VMM, and all the components are self-designed. The testbench can generate 36 kinds of VESA video formats, and supports the checking of the correctness of DUT’s output timing and the evaluating of the image processing quality of DUT. Several advanced technologies are integrated into the testbench, such as constrained random test, coverage-driven verification, transaction-level verification and assertion, while Blueprint and Callback are also used for supporting the executing of more test cases, which enhances the stability of the verification environment and improves the reusability. A dynamic constraint modifying technology is also studied, which enables users to control the coverage’s increase.Simulation result shows that this testbench can support multiple test cases including directed test and random test according to user’s configuration, and its high-level automation is also proved, which will improve the verification efficiency effectively.更多还原